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(Click for frequent words.) 76 netlist 72 datapath 66 RTL synthesis 66 SystemC models 66 parasitics 66 GDSII 65 parasitic extraction 65 parameterized 65 datatypes 65 Verilog RTL 64 GDSII flow 64 routability 64 VHDL code 63 MTCMOS 63 CoWare Platform Architect 63 PowerPro CG 63 PCB layout 63 DRC LVS 62 Xtensa processor 62 logic synthesis 62 testbenches 62 CellMath IP 62 synthesizable Verilog 62 PowerPro MG 62 Calibre xRC 62 synthesizable RTL 61 impedances 61 QoR 61 decoupling capacitors 61 Sequence PowerTheater 61 synthesizable 61 parametrically 61 RTL simulation 61 CoWare SystemC 61 OpenAccess database 61 waveform viewer 61 IBIS AMI models 60 external EEPROM 60 bytecodes 60 Talus Vortex 60 waveform 60 database schemas 60 FPGA prototyping 60 DDR PHY 60 DFT MAX 60 JTAG port 60 XPath expressions 60 Calibre xACT 3D 60 Java bytecode 60 SAR ADC 60 VHDL Verilog 60 Verilog 60 Magma RTL 60 PowerTheater 60 PID loop 60 equivalence checking 60 FPGA fabric 60 clock gating 60 PCell 59 CAD geometry 59 Calibre LFD 59 SPICE simulation 59 table LUT 59 lookup tables 59 TetraMAX 59 sequential clock gating 59 Design Compiler 59 SPICE simulators 59 HSIM 59 PSpice 59 TreeView 59 PCells 59 Xilinx FPGA 59 DataSet 59 Fast Fourier Transform FFT 59 RealView Profiler 59 schematic capture 59 synchronous rectifier 59 STARCAD CEL 59 SPICE simulator 58 parametric 58 IP XACT 58 testbench 58 threshold voltages 58 Xtensa processors 58 FineSim Pro 58 ZeBu Server 58 GridView 58 algorithmic synthesis 58 XSLT transformations 58 ADCs DACs 58 HSPICE 58 SOPC Builder 58 iterators 58 characteristic impedance 58 QuickCap NX 58 JTAG interface 58 FineSim SPICE 58 Xtensa LX processor 58 impedance measurements 58 highpass filter 58 deterministically 58 parameterization 58 #:# LVDS 58 capacitances 58 computationally efficient 58 fpgas 58 JFET 58 MCP# AFE 58 Vdd 58 CMOS transistors 58 VHDL 58 Verilog simulation 58 initialisation 58 parameterized cells 58 EM simulation 58 MATLAB algorithms 58 GDSII design 58 PLLs 58 Fractional N 57 Si substrate 57 IEnumerable 57 floorplanning 57 EDA tools 57 chromatograms 57 CustomSim 57 partial reconfiguration 57 debug 57 ANSI C 57 debuggers 57 VisualSim 57 ChipScope Pro 57 relational OLAP 57 Synplify 57 arbitrary waveforms 57 LINQ queries 57 MOSFETS 57 PyCell 57 QRC Extraction 57 AVR ONE 57 database schema 57 decoupling capacitor 57 ComboBox 57 XML metadata 57 IPexpress 57 PWM signal 57 BSDL files 57 Encounter Conformal Constraint Designer 57 manufacturability DFM 57 PID controllers 57 XML parsing 57 5V CMOS 57 CoFluent Studio 57 SiliconSmart 57 RealTime Designer 57 ZenTime 57 Actel FPGA 57 Verilog HDL 57 deep sub micron 57 Magma Talus 57 SPI interface 57 #b/#b encoding 57 DSP algorithm 57 binary executable 57 eigenvalues 57 toolpaths 57 Aceplorer 57 BPEL processes 57 waveforms 57 logic analyzer 56 postprocessing 56 ESL synthesis 56 FIFOs 56 single external resistor 56 initialization 56 JSPs 56 synchronous MOSFET 56 Agilent #A [001] 56 Esterel Studio 56 Synopsys Galaxy 56 geometry shaders 56 Xtensa LX 56 serializers 56 workcell 56 differential impedance 56 spectral density 56 Libero IDE 56 ISE #.#i 56 SQL scripts 56 ANSYS POLYFLOW 56 optimizing compiler 56 Synplify Pro 56 computational algorithms 56 MTP2 56 Regular Expression 56 synchronization primitives 56 Stratix III FPGAs 56 results QoR 56 AXI TM 56 serializer deserializer 56 graphical debugging 56 Cadence Virtuoso 56 datapaths 56 reflowed 56 BIST 56 synthesizable IP 56 LED brightness 56 arbitrary waveform generators 56 daughtercards 56 XSL FO 56 FPGA prototypes 56 Boolean logic 56 LEF DEF 56 lowpass filter 56 DPLL 56 FPGA 56 analog circuitry 56 parameter settings 56 pseudorandom 56 topology 56 ListView 56 Bezier curves 56 #b/#b [001] 56 DfM 56 rulesets 56 Fourier transforms 56 3D LUTs 56 vectorized 56 Talus Design 56 AdvancedMC module 55 multirate 55 treeview 55 precompiled 55 fast Fourier transform 55 Liberate MX 55 wavetable 55 FinFET 55 recursion 55 Cadence QRC Extraction 55 LVDS outputs 55 linearized 55 memory compilers 55 demodulated 55 adaptive equalization 55 termination resistors 55 referential integrity 55 Galaxy Constraint Analyzer 55 literals 55 prefetch 55 vertex buffer 55 external resistor 55 Fast Fourier Transform 55 cache coherency 55 GDSII reference 55 VoltageStorm 55 serializer 55 ConnX D2 DSP 55 pinout 55 Solido Variation Designer 55 XPath 55 interfaces 55 PowerArtist 55 DXF file 55 SystemVerilog verification 55 8bit MCUs 55 MicroBlaze processor 55 pinouts 55 Talus Vortex FX 55 subroutine 55 NURBS surfaces 55 fanout 55 Synplify DSP 55 TDR TDT 55 downconverter 55 debugger 55 ispLEVER 55 transconductance 55 PCR primer 55 SystemC TLM 55 mosfet 55 Simulink models 55 SIwave 55 impedance 55 Blast Create 55 regex 55 CMOS oscillators 55 loopback mode 55 MHz oscillator 55 lowpass 55 TTL compatible 55 transimpedance amplifier 55 DataTable 55 debugging 55 Hashtable 55 memory subsystem 55 serial EEPROMs 55 HSPICE R 55 ZeBu 55 ratiometric 55 Cortex M4 processor 55 Cadence Encounter 55 kit RDK 55 Cadence Encounter RTL Compiler 55 chip variation OCV 55 Boolean expressions 55 abstraction layers 55 serdes 55 AccelDSP 55 FPGA architectures 55 MOS transistors 55 demultiplexer 55 external resistors 55 Synplify Premier 55 bytecode 55 lithography simulation 55 MathWorks Simulink 55 leakage currents 55 parametric modeling 55 executable specification 55 LUTs 55 memory BIST 55 metamodel 55 impedance matching 55 EEMBC benchmarks 55 bandgaps 55 vibrational modes 55 DataSets 55 #.#μm CMOS 55 F#x [001] 55 embOS 55 Simulink 55 PRBS 55 Atrenta SpyGlass 55 embedded EEPROM 55 decoupling capacitance 55 bipolar transistors 55 postprocessor 55 rotary encoder 55 code refactoring 55 simulated annealing 55 Perl CGI scripts 55 hardware abstraction layer 55 DUTs 55 XSLT stylesheets 55 DAC outputs 55 XOR 55 ODBC compliant database 55 Bit Error Rate 55 JavaScript DOM 55 SiliconSmart ACE 54 EEPROM emulation 54 multi Vdd 54 finer granularity 54 Catapult C 54 Ansoft Designer 54 input impedance 54 oscillator frequency 54 #Kbyte [002] 54 Nexxim 54 modulation demodulation 54 Graphical User Interface GUI 54 deep submicron 54 XSD 54 Makefile 54 curve tracer 54 APS3 54 parasitic capacitance 54 LVCMOS 54 web.config file 54 DataGrid 54 LVTTL 54 compiler optimizations 54 asymmetric multiprocessing 54 I2C compatible 54 Virtuoso Passive Component 54 I2C interface 54 OpenArbor 54 LAPACK 54 AMBA protocol 54 Calibre DFM 54 VMMK #x# 54 W3C XML Schema 54 XSLT stylesheet 54 XML Schemas 54 Prover eCheck 54 recursively 54 ListBox 54 DWF files 54 reconfigurable hardware 54 WiCkeD 54 NanoTime 54 XMLBeans 54 associativity 54 Encounter Timing System 54 OLAP cubes 54 Talus RTL 54 VHDL simulation 54 CellMath Designer 54 GoldTime 54 RocketIO TM 54 #Kbytes [002] 54 pulse width modulation 54 Iub 54 massively parallel architecture 54 oxide thickness 54 iterator 54 analog circuits 54 deadtime 54 micrometer scale 54 SRAM DRAM 54 Synphony HLS 54 Quartus II 54 UCC# 54 parameterised 54 Synopsys PrimeTime 54 IBIS AMI 54 ARM7 processor 54 multi threaded architecture 54 raster images 54 SoCs ASICs 54 interprocess communication 54 Gaussian filter 54 parsers 54 automatable 54 SoC Encounter 54 Geometry Shader 54 ActiveRecord 54 hardware accelerators 54 level synthesis HLS 54 PID controller 54 planarity 54 RTL Compiler 54 #pF [002] 54 multiple CPU cores 54 OLTP database 54 Blast Fusion 54 coded RTL 54 compiler linker 54 malloc 54 SignalExpress 54 waveform generator 54 low jitter PLL 54 PXI chassis 54 treemap 54 5x #x 54 reconfigurable logic 54 vectorless 54 bidirectionally 54 chip SoCs 54 algebraic expressions 54 VTOC 54 pixel shaders 54 SystemC transaction 54 tables LUTs 54 variograms 54 ASIC FPGA 54 bitmaps 54 FloWizard 54 scale linearly 54 TSMC AMS 54 PHY# [001] 54 interleaving 54 MicroBlaze 54 Theseus Titanium 54 Python scripts 54 Actel Fusion PSC 54 voltage divider 54 voltage dividers 54 NexusRoute 54 Cortex M1 54 parameterisation 54 Altera FPGA 54 parallelization 54 FPGA designers 54 HardCopy ASIC 54 Forte Cynthesizer 54 Panasas storage 54 PrimeTime SI 54 CMOS compatible 54 output impedance 54 IO Link 54 parametric yield 54 stray capacitance 54 Precision Synthesis 54 coupling capacitors 54 HCS# 54 debugging tools 54 piezo actuator 54 modulation formats 54 flowcharting 54 mappings 54 FPGA synthesis tools 54 PICO Express 54 VarioTAP 54 bypass capacitor 54 SystemC modeling 54 DSPs FPGAs 54 NI TestStand 54 #ppm ° C 53 Hardware Description Language 53 ATmega#P [001] 53 AFEs 53 #bit MCUs 53 NURBS 53 Allegro PCB 53 PIC microcontroller 53 Xilinx ML# 53 ViewState 53 ASIC SoC 53 MTS# 53 deterministic jitter 53 MOS transistor 53 logic analyzers 53 parametrics 53 DesignWare Verification IP 53 multiprocessor architecture 53 PHY layer 53 Silicon Compiler 53 PICO Extreme 53 raster image 53 AWG# 53 GaAs MESFET 53 coprocessing 53 conditional formatting 53 Stratix II FPGA 53 VHDL AMS 53 Specman Elite 53 linearisation 53 parasitic capacitances 53 RET OPC 53 stripline 53 UMC #nm 53 pipelined architecture 53 CMOS circuits 53 #ksps 53 silicon interposer 53 IC Validator 53 Design Compiler Graphical 53 RDBMSs 53 SOAP HTTP 53 synchronous buck converter 53 cross sectioning 53 failovers 53 RISC processor 53 OrCAD Capture CIS 53 PECL 53 XFP module 53 HTML templates 53 Stratix IV FPGA 53 autonomically 53 PivotTables 53 instantiates 53 voltage CMOS 53 epitaxial layer 53 jitter clocks 53 JavaBeans 53 Olympus SoC 53 isometric drawings 53 amplicons 53 LTC#/-# 53 flyback converter 53 midplane 53 arbitrary waveform 53 Finite element 53 SQL queries 53 Regular Expressions 53 MOSFET gate 53 customizable dataplane processor 53 microcode 53 Josephson junctions 53 linear interpolation 53 HTTP headers 53 std : 53 finite element method 53 RS# interface 53 #MS s [002] 53 UML diagrams 53 ConvergenSC 53 CellMath 53 Differential Signaling 53 DIMM modules 53 SLEC System 53 #.#V CMOS 53 DSP architectures 53 nMOS 53 RedHawk SDL 53 XRT#L# 53 fragment shader 53 G.PAK 53 Active HDL 53 embedded processor cores 53 SoC Designer 53 ChIP Seq 53 DSP BIOS TM 53 ARChitect 53 Agility Compiler 53 sinusoidal 53 C#x + DSP 53 inductance capacitance 53 algorithms 53 antiparallel 53 QEMU 53 EEPROMs 53 bypass capacitors 53 #.#V [002] 53 JavaBean 53 XAUI interface 53 CoolTime 53 arrays FPGA 53 datasource 53 EEPROM memory 53 graphene layers 53 Repeatability 53 TestKompress 53 AMBA AXI 53 CPLD 53 Calypto PowerPro 53 XML vocabularies 53 Agilent U#A 53 inductor synthesis 53 5μm 53 servlets 53 boundary scan 53 histograms 53 Preconfigured 53 Quartz 2D 53 Cynthesizer 53 interrupt latency 53 Fast SPICE 53 kDiagnostics 53 EMPro 53 PWM outputs 53 Atmel AVR# 53 op amp 53 CoreMP7 53 XML schema 53 #bit ADC 53 ModelSim 53 #bit RISC 53 CFD solvers 53 cluster nodes 53 preprocessor 53 AT#SAM# [002] 53 dsPIC DSC 53 Verilog VHDL 53 SystemWeaver 53 wafer thickness 53 inductance 53 CMOS logic 53 parametric equalizer 53 nonvolatile memory NVM 53 LX#T FPGA 53 isolated flyback 53 Altera Quartus II 53 optimizations 53 XML parser 53 synchronous buck controller 53 instantiated 53 Methodology Kit 53 XML Schema 53 I2C bus 53 Ext4 file 53 TBrun 53 Xilinx Spartan 3A 53 CO# [001] 53 co planarity 53 anti aliasing filters 53 DDR2 memory interface 53 TetraMAX ATPG 53 DTDs 53 Lauterbach TRACE# 53 nonvolatile storage 53 GaN layer 53 AdvancedMC modules 53 Digital Converter ADC 53 symmetric encryption 53 DXF 53 FPGA CPLD 53 alpha blending 53 Descriptive statistics 53 JPEG encoding 53 Vpp 53 configurable 53 microstrip 53 concatenated 53 iRCX format 53 parameter estimation 53 worstcase 53 dc dc controller 53 MB#R# 52 toolpath 52 nested loops 52 nonvolatile memories 52 PowerShell commands 52 RISC DSP 52 SLEC RTL 52 HTTP server 52 DataWindow 52 #Mbyte [001] 52 vectorization 52 heterogeneous catalysts 52 TSQL 52 ASPX 52 sparklines 52 UML SysML 52 polylines 52 silicon debug 52 coupling capacitance 52 tapeout 52 modules EVMs 52 KBytes 52 ASICs FPGAs 52 pMOS 52 jitter attenuation 52 P Invoke 52 Parameter 52 SystemC simulation 52 TCI# 52 Nios processor 52 impedance input 52 fast Fourier transforms 52 PANTONE Color Libraries 52 SiGe bipolar 52 IC CAP 52 buck converter 52 quantization 52 NanoSim 52 AVR MCU 52 macros 52 #-bit/#MHz 52 parser 52 packet forwarding 52 PyCells 52 Finite Element Method 52 schematic symbols 52 repeatable measurements 52 thermo mechanical 52 DSP Builder 52 1Mbyte 52 Base# encoding 52 baud rate 52 GUI 52 WEP keys 52 ABAQUS CAE 52 byte FIFO 52 multibody 52 dc voltage 52 DXF files 52 MPSoC 52 frontends 52 quantum mechanically 52 ArrayList 52 usr lib 52 tolerancing 52 #kHz switching frequency 52 Tektronix oscilloscope 52 #Ω [001] 52 RISC cores 52 PSoC Designer 52 zener diode 52 PowerTrim 52 Factor Correction PFC 52 FPGA DSP 52 phylogenetic trees 52 instrumentation amplifiers 52 InCyte 52 GPIB interface 52 NVRAM 52 FPGAView 52 RF circuitry 52 frequency synthesizers 52 pulsewidth 52 stateful 52 schema 52 Xilinx FPGAs 52 Inductance 52 digitisers 52 MSC.Patran 52 AFS Nano 52 ATTO Disk Benchmark 52 Model #A 52 electromagnetic simulation 52 MCP#X 52 mod rewrite 52 Quartus II software 52 ARM AMBA 52 SmartFusion devices 52 deterministic 52 I2C compatible interface 52 vias 52 L1 cache 52 gate dielectrics 52 Query Language 52 geometries 52 pulse width modulator 52 TextBox 52 Arrays FPGAs 52 linearization 52 amplicon 52 PWM frequency 52 toolpath generation 52 Pulse Width Modulation 52 SiPs 52 Mitrion 52 SPICE accuracy 52 modulated signals 52 PID loops 52 Flash EEPROM 52 backplane connector 52 instrumentation amplifier 52 DLLs 52 HardCopy II 52 tuples 52 JNDI 52 eVC 52 PCIe Gen2 52 SystemC 52 Xilinx ISE 52 zener diodes 52 QDRII 52 Mode Simulation 52 MicroBlaze soft processor 52 singulation 52 SystemRDL 52 Debug 52 SQLite database 52 Encounter RTL Compiler 52 memory allocator 52 arpeggiator 52 subprocesses 52 8KB 52 HyperMesh 52 PivotTable 52 C# DSP 52 SPI#.# 52 optimizing compilers 52 Coverity Prevent SQS 52 PWM output 52 DFM DFY 52 Mentor Calibre 52 PlanAhead 52 XML parsers 52 bidirectional communication 52 mux 52 computationally expensive 52 custom ASICs 52 colloidal crystals 52 #Ω [002] 52 compiler assembler 52 verification signoff 52 uC 52 ARM microcontroller 52 locked loop PLL 52 TSMC Reference Flow 52 MAX# integrates 52 bitwise 52 CS#L# 52 Mazatrol 52 HDL simulator 52 TAS# [001] 52 CFD simulations 52 vNIC 52 XML namespaces 52 protein ligand 52 LVCMOS LVTTL 52 lognormal 52 Serdes 52 Verilog SystemVerilog 52 mutexes 52 GDB debugger 52 nonblocking 52 diffraction pattern 52 servomotor 52 unmixing 52 Stepper Motor 52 ACCELLERANT 52 IXP# [001] 52 voltage outputs 52 Javadoc 52 YieldAssist 52 parameterize 52 deconvolution 52 MIPS cores 52 #K bytes [002] 52 silicide 52 FPGA ASIC 52 Star RCXT 52 dielectric layers 52 SCE MI 52 subroutines 52 compiler debugger 52 serializer deserializer SerDes 52 Incisive Enterprise 52 RISC microprocessor 52 innovative FPGA PLD 52 INI file 52 μW 52 FlexPhase 52 bit RISC processor 52 massively parallelized 52 ZIF 52 Cadence Encounter digital 52 LDPC codes 52 gigabit serial 52 stylesheet 52 SOAP messages 52 Altera FPGAs 52 FETs 52 HDL Designer 52 Perl scripts 52 Purisma Data Hub 52 TTL CMOS 52 SymNet 52 XMP metadata 52 #ohm [002] 52 bitmap images 52 RASER 52 MPLAB 52 SQL commands 52 NUnit 52 pushbutton switch 52 SystemVerilog assertions 52 sigma delta modulator 52 Proficy Historian 52 Star RCXT TM 52 voltage MOSFET 52 EM simulators 52 ASIC prototyping 52 output voltage 52 mask ROM 52 UART interfaces 52 Freescale MQX RTOS 52 polyline 52 SRIO 52 rasterized 52 observability 52 Synplify Pro software 52 local oscillator LO 52 WebForms 52 multichip 52 segmentable 52 Logical Volume Manager 52 Boolean 52 XA Spartan 3A 52 bisulfite sequencing 52 charset 52 ColdFire architecture 52 polyhedral 52 Cortex M3 51 interface 51 photocurrent 51 multithread 51 ADSR 51 MPC#E processor 51 QT# [001] 51 DFT Compiler 51 RocketIO 51 fragment shaders 51 IEEE#.# [002] 51 Nios II Compiler 51 pore sizes 51 serial EEPROM 51 OpenROAD 51 Interpolation 51 programmable 51 ispLEVER design 51 RFLP 51 structured ASIC 51 thresholding 51 finite element modeling 51 scales linearly 51 reflow solder 51 SmartSpice 51 MAXQ# 51 PIN diode 51 MemoryScape 51 anti aliased 51 CST MWS 51 PMICs 51 FPGAView software 51 gaussian 51 generalized linear 51 Cadence Allegro 51 topological 51 coprocessor 51 Altivec 51 toolsuite 51 ENOB 51 Altera Stratix II 51 treemaps 51 Application Specific Extension 51 coplanarity 51 chemometric 51 XML formatted 51 extensible framework 51 simultaneous multithreading 51 demux 51 classpath 51 optimization algorithms