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(Click for frequent words.) 64 ownership CoO 64 SoC designs 63 SPICE accuracy 63 TetraMAX ATPG 62 Xtensa processors 62 parametric yield 61 Xtensa LX processor 61 Encounter RTL Compiler 61 Design Compiler Graphical 61 deep submicron 61 USB PHY 61 tapeout 61 Stratix II FPGAs 61 PowerPro MG 61 SystemC models 61 RapidIO Switch 60 QoR 60 UMC #nm 60 DFT MAX 60 FPGA designers 60 algorithmic synthesis 60 ASIC SoC 60 computational lithography 60 results QoR 60 Arria GX FPGAs 60 CellMath IP 60 chip SoC designs 60 Tessent 60 SOC designs 59 Cadence Encounter 59 SerDes 59 FPGA ASIC 59 GDSII flow 59 Quartz DRC 59 SoC designers 59 Silego 59 Methodology Kit 59 RF ICs 59 CustomSim 59 RFIC simulation 59 multicore DSP 59 jitter attenuation 59 FastSPICE 59 FineSim Pro 59 lithography simulation 59 PowerTheater 59 repeatable measurements 59 SoC Encounter 59 FPGA prototyping 59 IBIS AMI models 59 MCP# AFE 59 parasitic extraction 59 voltage CMOS 58 ASIC prototyping 58 TestKompress 58 synthesizable IP 58 SPICE simulators 58 Stratix II FPGA 58 HSPICE 58 partial reconfiguration 58 chip SoCs 58 FineSim SPICE 58 equivalence checking 58 TMS#C# DSP 58 routability 58 RTL Compiler 58 respins 58 nm nodes 58 CPU emulation 58 C# DSP 58 integrating NVM 58 SPICE simulator 58 RFIC design 58 HardCopy ASIC 58 NanoSim 58 VCXO 58 #nm FPGAs 58 iRCX format 58 CMOS ICs 58 SelfReliant 57 DesignWare IP 57 serializer deserializer SerDes 57 SPICE accurate 57 Calibre PERC 57 PowerArtist 57 Altera FPGAs 57 Theseus Titanium 57 Sequence PowerTheater 57 ASICs FPGAs 57 intrinsic jitter 57 Cadence SoC Encounter 57 FD SOI 57 VISIONPAD ™ 57 SignalExpress 57 Synplify Premier 57 C#x DSP 57 Cortex M4 processor 57 level synthesis HLS 57 Nios II processor 57 ESL synthesis 57 ARM#T# S processor 57 AFS Nano 57 Stratix II 57 Atrenta SpyGlass 57 NanoTime 57 Anirudh Devgan general 57 MVSIM 57 Encounter Timing System 57 Analog FastSPICE 57 CellMath Designer 57 embedded EEPROM 57 SOPC Builder 57 SPICE simulation 57 CellMath 57 Debug Solution 57 TSMC AMS 57 tapeouts 56 DDR PHY 56 SNR signal 56 TetraMAX 56 NanoCD 56 Synplify 56 LTE UE 56 Calibre LFD 56 ZenTime 56 reconfigurability 56 Stratix III FPGAs 56 MAX# integrates 56 DongbuAnam 56 Encounter Conformal 56 SoC Designer 56 CoWare ESL 56 SFDR 56 DRC LVS 56 HyperLynx 56 microelectronic device 56 #nm RF CMOS 56 DfM 56 Questa functional 56 AMS RF 56 synchronous Ethernet 56 PSoC Express 56 serializer deserializer 56 FlexPhase 56 CoolTime 56 #.# micron CMOS 56 Cortex R4 56 BIST 56 manufacturability 56 V# platform 56 IP cores 56 SiWare 56 PCB layout 56 RASER 56 observability 56 STARCAD CEL 56 MSP# MCUs 56 Xilinx FPGA 56 parasitic capacitance 56 PWM frequency 56 Configurable Logic 56 tapeout schedules 56 serializer deserializer SERDES 56 FPGAView 56 toolpath generation 56 Prover eCheck 56 Virtuoso IC 56 Catapult C 56 Simics 56 Virtuoso Multi 56 MSP# MCU 56 Evaluation Module 56 adaptive equalization 56 SoC Realization 56 SERDES 55 dsPIC DSCs 55 UCC# 55 emulsion PCR 55 Cadence Virtuoso custom 55 RFCMOS 55 nanometer nm CMOS 55 voltage MOSFET 55 CoWare Platform Architect 55 AFS Platform 55 fully synthesizable 55 embedded NVM 55 Silicon Compiler 55 PowerCentric 55 Cortex R4F processor 55 jitter measurement 55 PICO Express 55 IC Compiler #.# 55 GX FPGAs 55 Solido Variation Designer 55 Tsi# 55 #nm SoC 55 linearly scalable 55 XFP modules 55 Nios processor 55 customizable dataplane processor 55 Synplify Pro software 55 SAR ADC 55 ProASIC3 FPGAs 55 SiliconDrive 55 RLDRAM II 55 Stratix II GX 55 #LP [002] 55 #LP process 55 PRC# 55 SynTest 55 SoC 55 PICO Extreme 55 rms jitter 55 Calibre DFM 55 virtual prototyping 55 E StaX 55 DFM DFY 55 testbenches 55 UltraFLEX 55 kit PDK 55 Precision Synthesis 55 ConvergenSC 55 nanometer CMOS 55 Star RCXT 55 CMOS fabrication 55 TSMC #nm [001] 55 multicore architecture 55 XJTAG boundary scan 55 Xtensa processor 55 accuracy repeatability 55 optical modulation analyzer 55 Verification Platform 55 FPGA prototypes 55 RocketIO TM 55 ARM#JZF S processor 55 noise ratio SNR 55 DesignWare SuperSpeed USB 55 LAN# 55 Vdd 55 GDSII 55 smaller geometries 55 reconfigurable hardware 55 PCI Express PHY 55 voltage MOSFETs 55 Synopsys DesignWare IP 55 Altera HardCopy 55 BiCMOS 55 oscillator frequency 55 planarization 55 Synopsys Galaxy 55 QuickCap NX 55 ScanWorks platform 54 Stratix FPGAs 54 SoC verification 54 Cadence Encounter Digital 54 silicon oscillator 54 C#x + 54 Encounter Conformal Constraint Designer 54 RTL synthesis 54 OmniPixel3 HS 54 MCF# 54 VECTOR Express 54 Adopts Cadence 54 ARM# ™ 54 Diamond Standard #Micro 54 synthesizable 54 DSPs FPGAs 54 jitter tolerance 54 logic synthesis 54 EM simulation 54 Serdes 54 AVR ONE 54 XRT#L# 54 serial transceivers 54 Magma Talus 54 Virtuoso AMS Designer 54 EUV masks 54 Mixed Signal IC 54 DSP architectures 54 LPCVD 54 multi threaded applications 54 #/#nm 54 tighter tolerances 54 embOS 54 frequency synthesizer 54 Calibre nmDRC 54 clockless 54 Reference Flow 54 threshold voltages 54 Cortex M3 core 54 Design Compiler 54 Gbps transceiver 54 WinPath3 SuperLite 54 Talus Vortex 54 FPGA synthesis tools 54 Sigrity 54 1T FLASH 54 AeroScout MobileView 54 SC# processor 54 dc dc controller 54 Olympus SoC 54 L2 L7 54 RF amplifier 54 ARM#EJ processor 54 ARM#EJ S processor 54 continuous uptime 54 Serial RapidIO IP 54 Fast Fourier Transform FFT 54 linearization 54 Optigo 54 Silicon Realization 54 StarCore 54 Quartz LVS 54 #nm silicon 54 PIC microcontrollers 54 ISE #.#i 54 RotaryWave 54 transistor leakage 54 multiplexing capability 54 ACCELLERANT 54 extendible cores assist 54 Si#/# 54 CY# [003] 54 TxDAC 54 Incisive Enterprise 54 Fast SPICE 54 PCIe Gen2 54 LatticeEC 54 XDR DRAM 54 RFMD GaN 54 Cortex M1 54 tunable RF 54 MS#A 54 pulse width modulation 54 IBIS AMI 54 SiT# 54 DM#x [002] 54 deep sub micron 54 analog circuitry 54 Memory Controllers 54 nvSRAM 54 UltraCMOS 54 acoustic echo canceller 54 Synplify DSP 54 CFD simulations 54 Proficy Software 54 datapath synthesis 54 ARM#E 54 nanometer node 54 PLLs 54 GX FPGA 54 QT# [002] 54 Quartus II software 54 #nm SRAM 54 GoldenGate Veridata 54 bit RISC processor 53 datapath 53 Synplify Pro 53 Actel FPGAs 53 embedded SerDes 53 DesignWare Verification Library 53 ArchPro 53 Mode Simulation 53 SiGe bipolar 53 PHY IP 53 C#x DSPs [001] 53 FPGA synthesis 53 MOS transistors 53 CMP consumables 53 Altera Quartus II 53 MAXQ# 53 RealTime Designer 53 fix TTFF 53 DO #B certification 53 defectivity 53 #v# [004] 53 ChipX 53 Actel FPGA 53 MicroBlaze 53 reliability maintainability 53 MPSoC 53 HardCopy II 53 MMAV 53 multicore DSPs 53 nm FPGA 53 Valor DFM 53 8bit MCU 53 memory BIST 53 Stratix II GX FPGAs 53 8bit MCUs 53 embedded processor cores 53 Xilinx FPGAs 53 anti aliasing filters 53 SigmaQuad 53 QMEMS 53 LatticeECP3 53 TSQ Vantage 53 Star RCXT TM 53 Stratix III 53 Cadence Encounter digital 53 Barionet 53 Cynthesizer 53 FPGA architectures 53 #nm #nm [005] 53 local oscillator LO 53 PHYs 53 Parasitic Extraction 53 PowerPro CG 53 EUV mask 53 DPOJET 53 wafer uniformity 53 MoSys 1T SRAM 53 Arteris NoC 53 Structured ASICs 53 serial interconnects 53 PID controller 53 Lattice FPGAs 53 #.#ns 53 configurable processor 53 LED brightness 53 ARM AMBA 53 wafer thickness 53 HDL Designer 53 Agilent DisplayPort 53 analog semiconductors providing 53 PrimeYield 53 8G Fibre Channel 53 MOSFET gate 53 Autodesk Moldflow Insight 53 FloEFD 53 nano imprint 53 #.#μm CMOS 53 SmartFusion devices 53 uPD# [001] 53 programmability 53 RTL simulation 53 extendibility 53 microprocessor cores 53 ENOB 53 DSP algorithm 53 memory subsystem 53 jitter 53 FineSim 53 μsec 53 TOF TOF 53 Zemeter 53 magnetic rotary encoder 53 NI TestStand 53 ProSafe RS 53 RMI XLR 53 nm CMOS 53 PureTime 53 ARM7 processor 53 toolsuite 53 electromagnetic simulation 53 Altera Stratix IV 53 Synopsys PrimeTime 53 PDKs 53 custom ASICs 53 i.MX processors 53 TSMC Reference Flow 53 Gigabit PHY 53 MCMM 53 Powerful debug 53 fasp 53 clamping voltage 53 Fault tolerant 53 TCXO 53 #ppm ° C 53 AWG# 53 Zroute 53 LatticeECP3 ™ 53 Op Amps 53 Atmel ATmega#RFA# 53 Synplicity Synplify Pro 53 ChemetriQ 53 #.#um CMOS 53 MegaRAID controllers 53 ZeBu 53 datarates 53 #nm immersion lithography 53 FPGA 53 maximize uptime 53 debug 53 ZL# device 53 power dissipation 53 ARM#EJ S 53 Xilinx Spartan 3A 53 CoWare ConvergenSC 53 DesignWare PHY IP 53 PSpice 53 Tektronix oscilloscope 53 FPGA DSP 53 SoCs ASICs 53 GoldTime 53 chromatographic separations 53 analog HPA 53 RocketIO 53 #nm CMOS [001] 53 ASICs 53 Talus RTL 53 RFID printer encoder 53 absolute rotary encoders 53 Freescale QorIQ P# 53 LongRun2 53 Calibre xRC 53 Antun Domic senior 53 Model #A 53 PSRR 52 CEVA X# 52 QorIQ 52 SiTime 52 CMOS transistors 52 IC Compiler 52 sampling oscilloscope 52 leakage currents 52 #ns [002] 52 MTCMOS 52 Questa verification 52 multiplexed assays 52 correction OPC 52 Intel SpeedStep technology 52 #K#R 52 BiFET 52 logic CMOS 52 Ember EM# 52 self calibrating 52 SierraFC M8 4 52 Design Compiler topographical 52 RF baseband 52 chip variation OCV 52 AMS Reference Flow 52 Virtex 5 52 Synopsys IC Compiler 52 Solarstorm 52 JESD#A 52 eSPC 52 MIPS CPU 52 Verix 52 Actel Fusion 52 SiliconSmart 52 SOI CMOS 52 MB#K# 52 coprocessing 52 oxide thickness 52 Xtensa LX 52 photon detection 52 frequency PWM 52 8GHz 52 datapath designs 52 synchronous buck controller 52 YieldAssist 52 embedded nonvolatile memory 52 silicon germanium SiGe BiCMOS 52 embedded multicore 52 backside illumination BSI 52 Virtutech Simics 52 i.MX# processors 52 CdTe Si 52 Alchip 52 ARM9E 52 silicon oscillators 52 jitter wander 52 nanoPHY IP 52 CMOS logic 52 Design Kits 52 Virtuoso Accelerated Parallel Simulator 52 PLL Noise Analyzer 52 Kofax VRS 52 ProASIC3 devices 52 predictive diagnostics 52 thermal dissipation 52 Spartan 3AN 52 #ns [001] 52 PulseCore 52 SOC VSP 52 nanometer silicon 52 ATI FirePro graphics 52 bipolar transistors 52 SoC architectures 52 WiCkeD 52 Nios II processors 52 MLC NAND Flash 52 LTQ Velos 52 g accelerometers 52 MPC# processor 52 iScan System 52 Cadence Mentor 52 Mike Gianfagna 52 LightGAIN 52 PureSpec 52 AdvancedMC module 52 CAPEX OPEX 52 volumetric efficiency 52 APP# [002] 52 PROLITH 52 triplexer 52 Cree GaN 52 CMOS compatible 52 SIwave 52 Reference Methodology 52 SciFinance 52 GaAs PHEMT 52 LabVIEW graphical programming 52 DDR NAND 52 Accelerated Parallel Simulator 52 DesignSync 52 nvSRAMs 52 spectral purity 52 PXIT 52 Infiniium oscilloscopes 52 FlexTCA 52 ColdFire architecture 52 #GBASE T PHY 52 EG# [002] 52 Kilopass XPM 52 WAN emulation 52 Cadence Virtuoso 52 JasperGold 52 design kits PDKs 52 FPGAs 52 Marvell #W# 52 vBoost converter module 52 diode emulation 52 Xpedion 52 photon flux 52 dv dt 52 parasitic capacitances 52 MetaWare 52 Actional Diagnostics 52 HSPICE R 52 Nios II 52 PSoC architecture 52 LDMOS 52 Nios II Compiler 52 output capacitance 52 predictive decisioning 52 defect densities 52 workstation graphics accelerators 52 testability 52 SystemVision 52 Cadence QRC Extraction 52 loop HIL 52 PowerTheater Explorer 52 Multigig 52 repair MTTR 52 PeakView 52 quasi resonant 52 serdes 52 RTL verification 52 compute intensive tasks 52 CFD simulation 52 InterDigital differentiated technology 52 Fmax 52 Cortex M0 processor 52 JTAG port 52 nm geometries 52 transimpedance amplifier 52 dataplane 52 arbitrary waveform generator 52 signal analyzer 52 HSIM 52 TimeKeeper 52 DSP FPGA 52 TAS# [001] 52 crosstalk cancellation 52 ASIC FPGA 52 epi wafers 52 SoC prototyping 52 MemoryScape 52 SafeTraK 52 FS2 52 multirate 52 triple quadrupole mass spectrometer 52 SAW filter 52 manufacturability DFM 52 IC Validator 52 TI OMAP# processor 52 PlantPAx 52 ARM#J S 52 IronPoint Mobility 52 UltraWave #G 52 voltage derating 52 TMS#TCI# 52 #bit ADC 52 0 dBm 52 GNSS receivers 52 TMS#DM# [002] 52 MIPS# architecture 52 jitter clocks 52 SoCs 52 MicroBlaze processor 52 byte FIFO 52 #G CFP 52 low jitter PLL 52 Altera FPGA 52 ARM7TDMI processor 52 Blackfin BF#x 52 MEMS oscillators 52 Premal Buch general 52 bursty traffic 51 synchronous MOSFET 51 chip SoC 51 dielectric etch 51 Xgig 51 reproducibility 51 Cadence Incisive 51 Quartus II 51 5V CMOS 51 Proficy Process Systems 51 high voltage BCDMOS 51 BCM# reference 51 executable specification 51 Total Harmonic Distortion 51 SystemC synthesis 51 MirrorBit Eclipse 51 #.#uA 51 Lattice FPGA 51 logic analyzers 51 #bit MCUs 51 SiPs 51 voltage #.#V 51 Load Tester 51 POSIX conformant 51 CoreSight 51 RFIC 51 Proficy HMI SCADA iFIX 51 TLM#.# 51 Denali Databahn 51 arbitrary waveform generators 51 solutionsthat 51 op amps 51 modulation formats 51 Cortex M1 processor 51 MTS# 51 latency jitter 51 optical transceiver modules 51 compiler optimizations 51 magnetic encoder 51 5Gb s 51 deviceWISE 51 input capacitance 51 parasitics 51 AMBA AXI 51 C#x DSPs [002] 51 reprogrammability 51 IEEE #.# JTAG 51 multi threaded architecture 51 Test DFT 51 impedance matching 51 polishing pads 51 WS CRDS 51 di dt 51 PID loop 51 ARM CoreSight 51 1Gb DRAM 51 HardCopy ® 51 Zarlink ToP 51 Datastream 7i TM 51 LabWindows CVI 51 clock gating 51 BDNA Insight uniquely 51 harmonic filters 51 Spartan 3A 51 NI VeriStand 51 deep submicron CMOS 51 GridIron XLR8 51 Cortex R4 processor 51 deterministic latency 51 NeoKicks 51 Reference Verification Methodology 51 HardCopy 51 interrupt latency 51 Series oscilloscopes 51 5x #x 51 ARM Cortex M3 51 PMICs 51 emPROM 51 AXI TM 51 6WINDGate software 51 impedances 51 sequential clock gating 51 Nucleus RTOS 51 instrumentation amplifier 51 xPC Target 51 equivalence checker 51 Protocol Stacks 51 x ray optics 51 MEMS resonator 51 Silicon CMOS Photonics 51 SiSoft 51 strain gage 51 #nm LPe process 51 Renesas MCU 51 echo canceller 51 Dual Frequency 51 Calibre xACT 3D 51 UltraFLEX TM 51 multimode baseband 51 identical waveforms 51 silicon respins 51 millimeter wave mmWave 51 deep silicon etch 51 AWR Microwave Office 51 drastically shortens 51 FDTD Solutions 51 HiRel 51 Vic Kulkarni 51 PrimeTime SI 51 RedHawk SDL 51 boundary scan 51 SCS# 51 #nm immersion 51 tool suite WiCkeD 51 STR#F 51 nRF#AP# 51 multiplexing capabilities 51 Teseda 51 EDFAs 51 transimpedance 51 emissions combustor 51 Verification Methodology 51 high-k/metal gate 51 Softransceiver 51 DDR3 RDIMM 51 Talus Vortex FX 51 MICR accuracy 51 LabMaster 51 Tensilica processors 51 MIPS cores 51 IPsec SSL 51 enhanced MAID 51 fpgas 51 SystemVerilog verification 51 Verification IP 51 tunable optical 51 epitaxial layer 51 intermodulation distortion 51 netlist 51 Vativ 51 Verilog simulation 51 GDSII reference 51 Holtek 51 Taskero Universe ColorPath Verified 51 Magma RTL 51 seamless integrations 51 Measurement Studio 51 LynxOS SE 51 dramatically shortens 51 Adaptive DPSK 51 Simulink models 51 #bit MCU 51 extractables 51 ProSLIC 51 #G DQPSK 51 Analog FastSPICE Platform 51 GbE PHY 51 #nm MirrorBit 51 TI MSP# MCU 51 ATI FirePro S# 51 RF Microwave 51 MAX# MAX# [001] 51 loopback mode 51 TCI# 51 MIPS Verified 51 MatchPort AR 51 DDR Memory 51 ValiMed System 51 Solarflare #GBASE T 51 TestStand 51 DDR3 modules 51 RedHawk NX 51 LTQ Orbitrap Velos 51 jitter measurements 51 RtPM 51 scales linearly 51 throughput microarray 51 respin 51 GZIP compression 51 nP# 51 ruggedness reliability 51 wavelength tunability 51 vPort 51 Tundra Tsi# 51 Precise TPM 51 Z Foil 51 HardCopy IV ASICs 51 Finisar Xgig 51 1MHz switching frequency 51 QorIQ platforms 51 RTLinux 51 structured ASICs 51 SMIC #.#um 51 Structured ASIC 51 Virage Logic SiWare 51 PHY interfaces 51 Flash MCU 51 MIPI interfaces 51 OSNR 51 capacitances 51 Azuro 51 Keithley RF 51 HIT Kit 51 Infinisim RASER 51 exacting tolerances 51 CST MWS 51 InfiniPath 51 Databahn 51 Coverity Prevent SQS 51 patented 1T SRAM 51 CAN transceivers 51 scalable analytic 51 FPGA Supercomputing 51 OrCAD 51 Pattern Matcher 51 throughput 51 BCM# SoC 51 using CMOS BiCMOS 51 CompactRIO 51 curve tracer 50 Synphony 50 GX# [003] 50 SLEC RTL 50 repeatability 50 OMAP#x 50 PWM pulse width modulation 50 Denali Blueprint 50 CriticalBlue Prism 50 Blackfin processors 50 Precision RTL synthesis 50 Horizon #i 50 baseband LSI 50 heterogeneous architectures 50 BLDC motor 50 SystemC simulation 50 HF inlays 50 Stratix II devices 50 ETMemory 50 Panasas storage 50 ARChitect 50 SLC NAND flash 50 ARM# [003] 50 iCHECK 50 DAC# 50 ARM7TDMI R 50 EasyPath 50 Aceplorer 50 3Gb s SDI 50 Ansoft Designer 50 AMBA Designer 50 Marathon everRun 50 LPDDR2 memory 50 PowerTrim 50 Metrohm UK 50 Le# [002] 50 multicore architectures 50 introduction NPI 50 SyncE 50 Vcore 50 external EEPROM 50 i.MX# processor [001] 50 SOLiD ™ 50 LTE PHY 50 Altium Designer unified 50 CMOS silicon 50 ACA# 50 AEC Q# qualified 50 geometric distortion 50 #dB SFDR 50 EEPROM emulation 50 GNSS receiver 50 multicore CPUs 50 TI DSPs 50 LSA#A 50 #.# mW MHz 50 scalability adaptability 50 dataplane processing 50 iGateway Firewall 50 Spectrum FHSS 50 scale linearly 50 MSC# DSP 50 VCXOs 50 Bit Error Rate 50 Mentor Graphics Calibre 50 DesignWare USB 50 Agilent U# Series 50 silicon debug 50 GFlops 50 BlueCat Linux 50 Eric Filseth 50 scalable repeatable 50 GDSII design 50 verification signoff 50 servo controller 50 crosspoint switch 50 #EP processor 50 GaAs MESFET 50 optoelectronic packaging 50 reliability manageability