Related by context. All words. (Click for frequent words.) 58 QSPEs 53 Special Purpose Entities 51 Special Purpose Entity 48 tranching 48 Repo #s 48 SIMD 48 symmetric multiprocessing 48 SPUs 47 equitable subordination 46 L1 cache 46 HyperThreading 46 Hyperthreading 46 coprocessors 46 CPUs 46 hyper threading 46 superpositions 46 Altivec 46 CPU 46 AltiVec 45 RISC processors 45 Hypertransport 45 AMD GPUs 45 computationally intensive tasks 45 purpose entities SPEs 45 rasterization 45 symmetric multiprocessing SMP 45 GDDR2 45 motherboard chipsets 45 pixel shaders 45 compute intensive workloads 45 RISC architectures 44 DDR2 SDRAM memory 44 PowerNow 44 nVidia chipset 44 bit RISC processor 44 PropCo 44 integer arithmetic 44 computations 44 ABSs 44 multi threaded applications 44 JVMs 44 nonbanks 43 REMIC 43 Shor algorithm 43 elliptic curves 43 LBHI 43 Power7 chips 43 vertex shader 43 underclocked 43 multithreaded applications 43 ARM7TDMI S 43 Nvidia GPUs 43 SSE2 43 Schrodinger equation 43 qubit quantum 43 DDR2 DDR3 43 VIEs 43 cache coherency 43 RISC processor 43 ATI GPU 43 QSPE 43 coprocessor 43 SIVs 43 O subsystem 43 multicore architectures 42 ROPs 42 CSX# [001] 42 x# cores 42 GPUs 42 CDOs squared 42 NVIDIA GF# 42 HPC workloads 42 GF# chip 42 integer cores 42 northbridge 42 nForce4 SLI 42 socket AM3 42 shader cores 42 #nm Nehalem 42 MLEC 42 ISDA Master Agreement 42 #MHz DDR [001] 42 discrete GPUs 42 Quad Core CPU 42 L2 caches 42 PowerXCell 8i 42 microprocessor architectures 42 TCP IP offload 42 RISC cores 42 accretable yield 42 tranched 42 Symmetric Multiprocessing SMP 42 Phenom II X3 42 Memristors 42 SpeedStep 42 GMA X# graphics 42 SPVs 42 resecuritizations 42 microcode 42 computation 42 datapath 42 DSPs FPGAs 42 integer 41 regional energos 41 securitization trusts 41 FB DIMMs 41 GSAMP 41 RMBSs 41 trigonometric functions 41 Nvidia #M 41 multicore CPU 41 asymmetric multiprocessing 41 overcollateralisation 41 P4s 41 SSE3 41 simultaneous multithreading 41 #MIPS [002] 41 SIMD instruction 41 multiply accumulate 41 vertex buffer 41 processor cores 41 Java bytecode 41 subroutine 41 LGA# socket [001] 41 tablespaces 41 cores 41 CDOs 41 multiprocessor systems 41 Vehicles SIVs 41 multithreading 41 Texture Units 41 Bearlake 41 coprocessing 41 tempdb 41 GT# GPU 41 #.#v [004] 41 MRAMs 41 quantum bits 41 factorization 41 synthetic CDO transactions 41 Power5 chips 41 FHLBs 41 Lehman LEHMQ.PK 41 UBTI 41 Stream Processors 41 2MB cache 41 quad core CPUs 41 Neo K# 41 SIVs CDOs 41 Pentium 4s 41 securitized cardmember loans 41 RISC architecture 41 Parallel Sysplex 41 Core i5 #K [002] 41 Athlons 41 Beowulf cluster 41 Hybrid CrossFire 41 nForce #i 41 Trups 41 prebankruptcy 41 1MB L2 cache 41 SQL queries 40 GFLOPS 40 Microprocessors 40 #GTX + 40 DPUs 40 CPU cores 40 Asset Backed Securitization 40 re REMIC 40 GN# [001] 40 #GSE 40 contingently convertible debt 40 #MHz frontside bus [001] 40 GPU 40 Special Purpose Vehicles 40 NVIDIA chipsets 40 prefetch 40 QEMU 40 SIMD instructions 40 unified shader 40 subroutines 40 8MB L3 cache 40 Core2 40 securitization 40 securitizations 40 CalGen 40 subparts 40 multicore processors 40 CPU architectures 40 NVRAM 40 Speedstep 40 compute shader 40 ATI GPUs 40 interest entities VIEs 40 Eurosail 40 logical partitions 40 discrete GPU 40 Rhinebridge 40 Tesla GPUs 40 nonmarketable 40 Tensilica customizable 40 CPUs GPUs 40 BlueGene 40 RADEON HD 40 AMD Duron 40 computationally expensive 40 parallelization 40 topological quantum 40 shader processors 40 undersecured 40 DTDs 40 SPEC benchmarks 40 Dual Core processors 40 MBSs 40 moduli 40 reconfigurable hardware 40 Streaming SIMD Extensions 40 JSPs 40 Collateralized Debt Obligations CDOs 40 Base# encoding 40 symmetrical multiprocessing 40 southbridge 40 Debt Obligation 40 caching algorithms 40 linear interpolation 40 CDOs collateralised debt 40 resecuritized 40 equityholders 40 Fermi GPU 40 TBTF banks 40 IDIs 40 disk subsystem 40 IOs 40 multicore chips 40 XSLT transformations 40 scalar 40 AM2 motherboards 40 bitwise 40 multicores 40 Vertex Shader 40 Anisotropic filtering 40 quantum bits qubits 40 Computationally 40 GMACs 40 datatypes 39 optimisations 39 pulse width modulator PWM 39 pixel shading 39 parallelizing 39 FLPs 39 Asus motherboard 39 Multithreading 39 pixel shader 39 Lucid HYDRA 39 synthetic CDOs 39 gpu 39 servicers 39 REMICs 39 CDO tranches 39 memory subsystem 39 LBSF 39 obligations CDOs 39 Protium 39 hyperthreading 39 SLI setup 39 covenant lite loans 39 x4 slot 39 Nvidia SLI 39 Linpack 39 Power5 + processors 39 SLI mode 39 multiprocessors 39 nForce3 39 multiple CPU cores 39 fraudulent conveyance 39 massively parallel architecture 39 Intel LGA# [001] 39 DIP Lenders 39 Bosons 39 multithreading capabilities 39 heterogeneous multicore 39 intercompany receivables 39 Special Servicer 39 recursive queries 39 monoline exposure 39 2GHz Pentium 39 CrossfireX 39 CPU sockets 39 Intel GMA #M 39 6MB cache 39 Encounter Conformal Constraint Designer 39 securitized pools 39 GPGPU computing 39 AHERF 39 Debt Obligations 39 SLI connector 39 1Mbyte 39 LJM2 39 MATLAB algorithms 39 geometry shaders 39 RAID0 39 multiprocessing 39 Nvidia Quadro FX #M 39 #KB L2 cache 39 ABCP conduits 39 GF# [003] 39 Gigaflops 39 quantum cryptographic 39 #.#ghz [002] 39 Ocwen Solutions 39 tessellation 39 shaders 39 monolines 39 Semprons 39 dataplane processing 39 DDR3 SDRAM 39 synchronization primitives 39 5xx 39 Collateralized Debt Obligations 39 gigaflops 39 GPGPUs 39 RAMs 39 subprime mortages 39 #Mbyte [001] 39 FRSSE 39 securitizer 39 interprocess communication 39 Monte Carlo simulations 39 multicore DSPs 39 unified shaders 39 CarCo 39 LTV ratios 39 malloc 39 HyperTransport links 39 CPU RAM 39 securitized loans 39 operands 39 initialisation 39 DX#.# 39 #.#GHz Atom [002] 39 #W ACP 39 Multi threading 39 #.#GHz CPUs 39 Scalable Link 39 SATA #.#Gbps 39 TeraFLOPS 39 SSE3 instructions 39 CDPCs 39 hardware accelerators 39 securitized timeshare 39 SILO transactions 39 cellular automata 39 BHCs 39 pinouts 39 GPIO ports 39 1GB PC# 39 Fourier transforms 39 multicore CPUs 39 #nm RV# 39 Power5 38 GDDR5 38 GMA X# 38 programmable shaders 38 SystemWeaver 38 UUID 38 RV# graphics 38 CDO squareds 38 Phenom X4 38 OpCo 38 CRIIMI MAE 38 peripheral interfaces 38 OpenCV 38 architectures 38 GHz Power6 38 KB L2 cache 38 abstraction layers 38 elliptic curve 38 prepetition secured 38 IBM eServer p# 38 LINQ queries 38 SARFAESI Act 38 PPIFs 38 nondepository 38 quantum computation 38 subprocesses 38 Monolines 38 #MHz GPU 38 DDR1 38 Celeron M 38 XML parsing 38 insured depository institutions 38 instantiate 38 C#x + DSP 38 CrossFire configuration 38 DDR2 DRAM 38 fraudulent conveyances 38 multithreaded 38 Hyper Threaded 38 fragment shader 38 GPU cores 38 #i SLI 38 Intel Xeon CPUs 38 ARM# [003] 38 DRTs 38 Intel Core2 Quad 38 SIFTs 38 SIFIs 38 DDR2 SDRAM 38 Covenant lite 38 buck converters 38 parallelize 38 LBDP 38 prudential regulations 38 Cheyne SIV 38 GFLOPs 38 CUDA Cores 38 Quick Path Interconnect 38 SIMD Single Instruction 38 #nm GPU 38 integrals 38 Collateralized Debt Obligations CDO 38 parsers 38 Linpack benchmark 38 dischargeability 38 Transeastern Lenders 38 Intel X# graphics 38 trust preferreds 38 interrupt latency 38 1x 2x 38 external EEPROM 38 ITX WiFi 38 securitized 38 Core i7 #UM 38 GTX SLI 38 TILA disclosure 38 FHLMC 38 multi threading 38 ATI Crossfire 38 FSBs 38 i3 #M 38 #.#GHz P4 38 Multithreaded 38 ARM#J S 38 Conveying Subsidiaries 38 FRNs 38 indubitable equivalent 38 parallelized 38 multiprocessor architecture 38 Navier Stokes equations 38 cramdown 38 EVGA GeForce 38 GSEs 38 Nvidia Tesla GPUs 38 NAND FLASH 38 BCLK 38 i#/i# 38 subnetworks 38 FFIs 38 VRDOs 38 MapReduce 38 NCSLT Trusts 38 ABS RMBS 38 SSE4 38 #M GT graphics 38 Refco creditors 38 debtors 38 severely undercapitalized 38 #MHz frontside bus [002] 38 GDDR2 memory 38 2GB DDR 38 intercreditor agreements 38 SIV lite 38 re REMICs 37 universal binaries 37 EEMBC benchmarks 37 MHz frontside bus 37 gigaflop 37 FreddieMac 37 E# CPU 37 nonbanking 37 Core i7 CPUs 37 socket LGA 37 vectorization 37 synthetic CDO 37 unlocked multipliers 37 literals 37 compute intensive 37 x4 x8 37 #W TDP [002] 37 GDDR 37 C#x + 37 GeForce #GTS 37 Freescale PowerPC 37 circuitries 37 kbit 37 GeForce #M graphics [001] 37 Mobility Radeon HD 37 GeForce #GX# 37 multiprocessor 37 mathematical formalism 37 PowerBook G4 #mb SO 37 analog circuits 37 collateralizing 37 HoldCo 37 entities 37 NOR NAND 37 flyback converter 37 Universal Video Decoder 37 PC# SDRAM 37 #.#GHz AMD Turion 37 HomeEq 37 IRUs 37 hyperthreaded 37 #/#MHz [001] 37 TSQL 37 DPCs 37 LPAR 37 Intel Pentium D 37 CPU cycles 37 QDRII 37 x# slots 37 RDBMSs 37 covenant lite 37 memristors 37 named CADIE 37 multiplications 37 2GB GDDR5 37 cramdowns 37 vertex shaders 37 SLC NAND 37 collaterized debt obligations 37 nulls 37 #M GPUs 37 Kalman filter 37 APRA regulated 37 NVIDIA #M 37 Tricadia 37 undrawn commitments 37 TI TMS#DM#x 37 8GHz 37 OpenMP 37 ALUs 37 SODIMM 37 subchapter S 37 GF# graphics 37 #MIPS [001] 37 Spanning Tree Protocol 37 RISC microprocessor 37 DSP architectures 37 Defaulted securities 37 #M GPU [001] 37 cluster nodes 37 re remics 37 Counterparties 37 CDSs 37 PWM frequency 37 subprimes 37 Quantum cryptography 37 mosfets 37 Securitization 37 Landesbanks 37 GB sec 37 noteholder 37 MB DDR2 SDRAM 37 datapaths 37 multi threaded architecture 37 Special Servicer Rating 37 catoms 37 IBM p# 37 Core i3 Core i5 37 Phenom IIs 37 Phase Locked Loops 37 tuples 37 massively parallel supercomputers 37 compute cycles 37 Atom D# 37 TRUPS 37 FLOPS 37 quantum mechanically 37 AMD Dual Core 37 bytecodes 37 nonzero 37 CDS counterparties 37 Ambac insured 37 Vehicle SIV 37 GFlops 37 #GB/sec 37 securitizing mortgages 37 CrossFireX 37 datagrams 37 unified namespace 37 swap counterparty 37 SIV lites 37 AGP 8x 37 symmetric multiprocessor 37 PPNs 37 SAP APO 37 GigaThread 37 GHz Celeron M 37 executory contracts 37 Geforce #GTX 37 interlocking directorships 37 ACCELLERANT 37 Petition Date 37 GeForce #GT graphics 37 securitization exposures 37 vehicle SPV 37 KB RAM 37 covenant lite deals 37 Structured Investment 37 LPARs 37 GDDR3 37 ASCI Purple 37 Fast Fourier Transform FFT 37 procyclicality 37 DDR3 memory controller 37 CDO CLO 36 UITF 36 Blackfin processors 36 OneNAND Flash 36 CUDA cores 36 constitute discloseable transaction 36 Core i7s 36 Intel GMA 36 asymmetric cryptography 36 LINPACK 36 Phenom FX 36 2GB RAM 36 SDRAM memory 36 Leveraged Capital 36 systemically risky 36 @ 6W processor 36 BZ2 36 DIMMs 36 collaterised debt obligations 36 unobservable inputs 36 DIMM modules 36 shader 36 TTL CMOS 36 Judge Lifland 36 Kleros Real Estate 36 frontside bus 36 GeForce GTS 36 PipeCo 36 REIT Exemption 36 #LE [002] 36 registered DIMMs 36 JEDEC specification 36 Pentium4 36 RAID #/#/#/# 36 interleaving 36 std : 36 CDO squared 36 IAS IFRS 36 SRAM DRAM 36 CoCos 36 amyloid fibers 36 DB2 databases 36 noteholders 36 ABS CDOs 36 modulo 36 cryptosystems 36 Socket AM2 36 Pay Option ARMs 36 parallelism 36 SiS Mirage 36 SB# southbridge 36 NForce 36 Nforce 36 computationally intense 36 #Mbytes [001] 36 mobos 36 UML diagrams 36 finite reinsurance transactions 36 fast Fourier transform 36 HAMP servicers 36 SPECfp rate# 36 buck converter 36 GDDR3 RAM 36 Synthetic CDOs 36 CDO squared transactions 36 nForce #i SLI 36 ARM# core [001] 36 #.#GBps 36 2MB L2 cache 36 EquaGen 36 #-/#-bit 36 Ginnie Mae MBS 36 RMBS CMBS 36 shader clock 36 ROM RAM 36 collateralised debt 36 Master Servicer 36 programmable shader 36 Interface MPI 36 #W TDP [001] 36 MB L2 cache 36 ICH# 36 liquidity buffers 36 Windows logon passwords 36 CMOS transistors 36 TRUPs 36 Intel GMA X# 36 highly parallelized 36 parameterized 36 1GB GDDR3 36 GDDR5 memory 36 JUGENE 36 discrete graphics chip 36 #b/#b [001] 36 XTs 36 1Gbyte 36 NIST quantum 36 Finova 36 zIIP 36 framebuffer 36 computationally intensive 36 securitized mortgages 36 demultiplexer 36 RV# chip 36 PCI Express Gen2 36 #Kbytes [001] 36 DDR3 DDR2 36 distribution QKD 36 ATI Radeon X# XTX 36 nondeterministic 36 #M GT 36 FHLMC preferred stock 36 ARM Cortex R4 36 SQL commands 36 dsPIC DSC 36 BOFIA 36 #/#-bit [001] 36 AMD FireStream 36 collateralized debt 36 OFCs 36 WindowsCE 36 MTCMOS 36 TIBC 36 DX# GPU 36 #.#Gbit/sec 36 #MB GDDR3 memory 36 ABS CDO exposures 36 #.#MHz [008] 36 threshold voltages 36 collateralised debt obligations CDOs 36 securitisations 36 Intel ICH# 36 ABCP trusts 36 Resecuritization 36 quantum mechanical 36 ClearNAND 36 Qualcomm MSM# 36 DWs 36 FSAA 36 DX9 36 #MHz G4 36 counterparties 36 hotplug 36 bondholders 36 DIMM sockets 36 Kbits 36 Intel GMA# 36 cov lite 36 compute 36 GeForce #M GS 36 Pentium IV 36 SATA 3Gbps 36 BankCo 36 pseudorandom 36 #V rails 36 Underwriter Defendants 36 #MHz memory 36 #bit [001] 36 risk mitigants 36 Phenom II X4 #BE 36 Tesla C# 36 X#XT PE 36 VMware DRS 36 #Mbyte s [002] 36 Countrywide Servicing 36 SCI passim 36 #MB DDR memory 36 GPIOs 36 GeForce #GT 36 plain vanilla mortgages 36 DDR2 memory controller 36 #MHz DDR SDRAM 36 #bit [002] 36 Collateralized Debt Obligation 36 #FSB 36 intersegment transactions 36 option ARMs 36 GHz CPU 36 Feshbach resonance 36 #MB VRAM [001] 36 Dhrystone 36 synchronous DRAM 36 Xtensa LX processor 36 Core Duo chips 36 prudentially regulated 36 Triaxx 36 #mhz [001] 36 #bit memory 36 crossholdings 36 DFIs 36 clock gating 36 CDS counterparty 36 NVIDIA GPUs 36 CCCIT 36 qubits 36 SBICs 36 SATA 6G 36 finite element method 36 collateralise 36 3GHz Pentium 4 35 Mann Bracken 35 6MB L3 cache 35 LISP 35 PCMark 35 calcs 35 CPDOs 35 vehicles SPVs 35 frontends 35 SPECpower ssj# 35 bistability 35 subprime CDOs 35 FOFs 35 #M GS 35 QRMs 35 vConsolidate 35 LJMs 35 securitizers 35 Core i5 CPUs 35 DXVA 35 dimensional nanostructures 35 LDMOS devices 35 escheat laws 35 Gramercy Realty 35 JIT compiler 35 SIV 35 Subchapter S 35 Debtors 35 DMIPS 35 memory addressability 35 DDR2 #MHz [001] 35 triparty repo 35 AIG counterparties 35 DDR3 modules 35 Digic III 35 derivative counterparties 35 #GX# 35 7GHz 35 DIMMS 35 bit RISC CPU 35 lookup tables 35 mathematical algorithm 35 willful defaulters 35 transistor SRAM 35 SiS# chipset 35 Freddie FRE 35 JIT compilation 35 ViewState 35 #mhz [002] 35 solitons 35 8bit 35 SPV 35 intertemporal budget 35 Zacate APU 35 π 35 en pago 35 Redknee refer 35 WHIP FIP BABIP 35 FineSim Pro 35 hashing algorithm 35 TDPs 35 Loan originators 35 kbyte 35 quantum computations 35 Nvidia Geforce 35 compiler optimizations 35 ion traps 35 Gbits s 35 #MHz FSB [001] 35 SIVS 35 trustee Herbert Stettin 35 5x #x 35 SPECviewperf 35 CUDA architecture 35 encrypt decrypt 35 DIP lenders 35 C#x [001] 35 pixel pipelines 35 asset backeds 35 superscalar 35 Error Correction 35 transferor 35 debtor creditor 35 interconnecting piping 35 AM2 + motherboards 35 helical structures 35 #nm lithography [002] 35 PCI Express interface 35 STT MRAM 35 DCENT 35 TruPS 35 UD2H 35 #.#GHz processors [002] 35 recompilation 35 systemically important 35 XSLT transformation 35 Collateralised Debt Obligations CDOs 35 Hardship Letter 35 counterparty 35 subordinate tranches 35 JESD# [002] 35 FxCop 35 Breakpoints 35 instantiated 35 undercollateralized 35 Mortgage Investment Conduits 35 SQL scripts 35 instantiations 35 pixel shader processors 35 QRM definition 35 Geforce GTX 35 CDOs SIVs 35 X#XT [002] 35 Files Voluntary Petition 35 CDOs CLOs 35 Noteholder 35 NVIDIA Tesla GPUs 35 Nonbank 35 BKUNA 35 ATI HD# 35 eigenvalues 35 6Gbps SAS 35 muxes 35 watt TDP 35 multithread 35 checksum 35 callable CDs 35 GeForce #M graphics [002] 35 CTIMCO 35 Issuing Trusts 35 RMBS CDOs 35 Message Passing 35 TMS#F# 35 mortgagebacked securities 35 nonvolatile storage 35 sublayer 35 Intel #GME 35 hardware abstraction layer 35 DDR2 SO DIMM 35 quad SLI 35 nondebtor 35 prepetition 35 DIMM slot 35 CrossFire configurations 35 2 Duo ULV 35 MACRS 35 TMS#C#x + DSP 35 OID 35 megaflops 35 LVDS interface 35 complex mathematical equations 35 compute nodes 35 ABCPs 35 DataSets 35 SMs 35 Securitizations 35 PCI Express x4 35 subprograms 35 numerics 35 Collateralised Debt Obligations 35 HLSL 35 Servicers 35 KByte 35 GB GDDR5 35 contractual subordination 35 Celerons 35 electromechanical coupling 35 non dischargeable 35 intercreditor agreement 35 simulated annealing 35 Unfairly computing 35 EquaGen LLC 35 vertices 35 Broc Romanek editor 35 #x# multipliers 35 debtors estates 35 Teraflops 35 Einstein Podolsky Rosen 35 PCMOS 35 System x iDataPlex 35 #GX chipset 35 CDO exposures 35 Core i#/i# 35 indenture trustees