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(Click for frequent words.) 70 SIMD instructions 69 L1 cache 69 SSE2 66 AltiVec 66 Altivec 66 VLIW 65 multiply accumulate 64 RISC processor 64 processor cores 63 SSE3 63 datapath 63 #MIPS [002] 63 SSE4 62 Instruction Multiple 62 pixel pipelines 62 multiprocessor 62 hyperthreading 62 hyper threading 62 HyperThreading 62 bit RISC processor 62 CPU cores 62 #Kbyte [002] 62 Intel EM#T 62 RISC cores 62 bit RISC CPU 62 parallelization 62 pixel shader 62 SSE5 62 x# cores 61 fpgas 61 MIPS# 61 SIMD Single Instruction 61 symmetric multiprocessing SMP 61 shader processors 61 pixel shaders 61 fragment shaders 61 shader cores 61 Streaming SIMD Extensions 61 CUDA cores 61 coprocessor 61 RISC processors 60 multi threaded 60 multiprocessing 60 multithreading 60 SIMD instruction 60 Cortex M4 60 processing cores 60 Hyperthreading 59 multi threading 59 1Mbyte 59 unified shader 59 pixel shader processors 59 Hyper Threading 59 Xtensa processor 59 Fast Fourier Transform FFT 59 8MB L3 cache 59 2MB L2 cache 59 multiprocessors 59 GPUs 59 GPU cores 59 PowerPCs 59 #bit RISC 59 bytecodes 59 AGP 8x 59 CPUs 59 Quick Path Interconnect 59 ARM# core [001] 59 SH 4A 59 operands 59 ARM7TDMI S 59 #.#GB s [001] 59 MPC# processor 59 superscalar architecture 59 AMD FireStream 59 IOP# 59 ALUs 59 prefetch 58 kbytes 58 1MB L2 cache 58 #bit [001] 58 #Kbytes [002] 58 Xtensa 58 kbyte 58 C#x + 58 asymmetric multiprocessing 58 GB sec 58 rasterization 58 coprocessors 58 multithreaded 58 3DNow 58 DDR3 memory controller 58 fragment shader 58 #KB L2 cache 58 DMIPS MHz 58 graphics subsystem 58 CPU 58 VLIW architecture 58 DDR2 memory controller 58 eSi 58 superscalar 58 MB L2 cache 58 OpenMP 58 unified shaders 58 PCIe interface 58 #K bytes [002] 58 KB L2 cache 58 ARMv7 58 multicore DSPs 58 Xtensa LX processor 58 8GHz 58 cache coherency 58 EM#T 58 FPGA fabric 57 6MB L3 cache 57 #MIPS [001] 57 #/#-bit [001] 57 Xilinx FPGA 57 simultaneous multithreading 57 GDDR5 memory 57 multiple CPU cores 57 datapaths 57 ARM# [003] 57 L2 cache 57 GPU 57 #Kbyte [001] 57 Cortex A8 processor 57 RISC CPU 57 MIPS# architecture 57 SH 2A 57 Dhrystone 57 GDDR 57 dataplane processing 57 shader 57 multithreaded processors 57 optimizing compiler 57 GDDR3 memory 57 integer cores 57 cluster nodes 57 Turbo CORE 57 Ethernet MACs 57 Multi threading 57 ARM#T 57 cache #KB 57 #MB GDDR3 memory 57 #D/#D graphics engine 57 Gbits s 57 MIPS processor 57 TMS#DM# [002] 57 RISC microprocessor 57 Xtensa LX 57 multiprocessor systems 57 symmetric multiprocessing 56 Intel Xeon E# 56 Vertex Shader 56 DDR memory 56 TMS#C# TMS#C# 56 Cavium OCTEON 56 x# instruction 56 cores 56 octal 56 AGP 8X 56 gpu 56 pipelined architecture 56 multithread 56 integer 56 ARM7 56 scales linearly 56 coprocessing 56 shared L3 cache 56 datatypes 56 multi threaded applications 56 microprocessor architectures 56 Cortex M4 processor 56 hardware accelerators 56 p5 #Q 56 O subsystem 56 HyperTransport links 56 MicroBlaze 56 fully synthesizable 56 MIPS cores 56 RISC DSP 56 DMIPS 56 SystemWeaver 56 synthesizable 56 8KB 56 tessellation 56 L3 cache 56 GDDR5 56 fast Fourier transform 56 DMA controller 56 Java bytecode 56 clock gating 56 GFLOPS 56 Texture Units 56 Intel Xeon CPUs 56 ARM# processor [001] 56 Hypertransport 56 Application Specific Extension 56 shaders 56 SGMII 56 #-/#-bit 56 MIPS CPU 56 LPC# 56 #.#GT s 56 vertex shader 55 programmable vertex 55 8bit 55 3Gb/sec 55 massively parallel architecture 55 ARM#EJ S TM 55 heterogeneous multicore 55 PowerPro MG 55 H8SX 55 DDR2 SDRAM 55 ARM#J S 55 ARM#EJ S 55 L2 caches 55 GB DDR3 55 A8 processor 55 4KEc 55 M#K 55 ARM NEON 55 vertex engines 55 IA# [003] 55 Hyper threading 55 ARM cores 55 hardware acceleration 55 processor DSP 55 uClinux 55 programmable shaders 55 Cortex A9 processors 55 multirate 55 Tensilica Xtensa 55 AMD HyperTransport 55 #bit PCI 55 LVDS interface 55 Dual Core processors 55 SPARC V8 55 GPU accelerators 55 PowerPC processor 55 #Mbyte [001] 55 XCore 55 #KB L1 55 matrix multiplication 55 #bits 55 e# cores 55 SDRAM memory 55 MIPS# ® 55 TI C#x 55 LGA# processors [002] 55 A9 processor 55 Cortex A9 MPCore 55 C#x + DSP 55 KBytes 55 TMS#C#x + DSP 55 Stream Processors 55 serdes 55 #MHz DDR [001] 55 PCI Express interface 55 Kbits 55 MHz DDR2 55 VPU 55 Intel HyperThreading 55 Cortex A8 55 GBps 55 GZIP compression 55 Nvidia GPUs 55 AVR# [002] 55 TI TMS#C# 55 MByte 55 2MB L3 cache 55 ARM# ™ 55 Power4 + 55 GFlops 55 peripheral DMA 54 NOR NAND 54 #kB [001] 54 ARM# [001] 54 ARM7TDMI 54 MIPS processors 54 2MB cache 54 SGI RASC 54 Nvidia Tesla 54 intrinsics 54 DDR# memory 54 AMD GPUs 54 RISC 54 DSP architectures 54 DDR PHY 54 DDR1 54 Cortex A9 54 GPGPU 54 CrossFireX 54 PowerPC #GX 54 Flash microcontroller 54 scalar 54 GPIO 54 parallelism 54 Gbps transceivers 54 GDDR3 54 ARMv6 54 Gb sec 54 ADSP BF# 54 Neo K# 54 unified shader architecture 54 SpeedStep 54 Cortex M1 54 #MHz frontside bus [001] 54 C#x DSPs [001] 54 Quadro GPUs 54 compiler optimizations 54 FB DIMM 54 northbridge 54 CPU sockets 54 MIPS# TM 54 TurboBoost 54 UARTs 54 Cortex processor 54 UltraSPARC T1 54 LVCMOS LVTTL 54 #mhz [001] 54 Kentsfield 54 C#x [001] 54 parallelized 54 Clarksboro chipset 54 CPU architectures 54 geometry shaders 54 GLSL 54 Cortex M3 54 FPGA architectures 54 ATI GPUs 54 #.#GHz CPUs 54 MSC# [001] 54 #D/#D graphics 54 multicore architecture 54 hyperthreaded 54 binary compatible 54 nForce #i SLI 54 PowerVR SGX graphics 54 #nm Nehalem 54 Cortex M0 54 pixel shading 54 x# processors 54 AMBA AXI 54 Flash microcontrollers 54 4U server 54 Westmere EX 54 ARM Cortex ™ 54 multicore processors 54 microprocessor cores 54 Tesla C# 54 TCP IP offload 54 8GB DDR2 54 shader clock 54 serial RapidIO 54 AVR MCU 54 ARM9 54 RAID0 54 HyperTransport 54 TMDS 54 STR#F 54 Tensilica processors 54 Logical Volume Manager 54 Dual Core Opteron 54 IBM PowerPC 54 DDR2 #MHz [001] 54 OCTEON Plus 54 HCS# 54 multicore processor 54 HLSL 54 DSP FPGA 54 Nehalem EX 54 Cortex M3 core 54 ADRES 53 LX#T FPGA 53 x# PCI Express 53 NPUs 53 MPC#e 53 #MHz FSB [001] 53 programmable shader 53 hyper threading technology 53 PCI Express x# 53 multicore CPUs 53 microMIPS ISA 53 multicore CPU 53 Freescale QorIQ P# 53 SRIO 53 #:# LVDS 53 Symmetric Multiprocessing SMP 53 DDR2 DRAM 53 Quad Core processor 53 MSC# DSPs 53 CEVA Teak 53 x# slots 53 OpenAccess database 53 Nvidia CUDA 53 quad core CPUs 53 multibit 53 ARM#E 53 parameterized 53 #Gbit [001] 53 QUICC Engine technology 53 MIPS# #KE 53 #MHz GPU 53 CSX# [001] 53 ARM Cortex R4 53 uCLinux 53 vertex shaders 53 Turbo Mode 53 #x# multipliers 53 #MB VRAM [001] 53 PXIe 53 Direct3D 53 stateless offload 53 SBC# [003] 53 x# PCIe 53 #GBps 53 Radeon X# [001] 53 vectorization 53 parallelizing 53 #/#bit 53 Nvidia SLI 53 AMD Athlon# 53 #KB L2 53 MHz FSB 53 embedded processor cores 53 ARM CPU 53 1GB GDDR3 53 ARM Cortex A9 MPCore 53 DDR DRAM memory 53 raytracing 53 PC# SDRAM 53 DDR2 memory interface 53 PCIe x1 53 graphics accelerator 53 ANSI C 53 #Kf 53 pipelined 53 Multiprocessor 53 Fourier transforms 53 ARM#EJ processor 53 IBM POWER5 53 ARM Cortex M0 53 ATI GPU 53 MIPS# cores 53 Kbyte 53 Multithreaded 53 marchitecture 53 IGP chipset 53 SODIMM 53 Westmere processors 53 asynchronous 53 Quad Core CPU 53 SLI mode 53 DIMM sockets 53 Samsung S#C# 53 Message Passing 53 frontside bus 53 SPARC# 53 #K CPS 53 ARM Cortex M3 53 compute node 53 LVTTL 53 GPIOs 53 i7 processor 53 logical partitioning 53 Freescale QorIQ 53 ARM#E S 53 1GB PC# 53 AXI TM 53 Transition Minimized Differential Signaling 53 Blackfin processor 53 multi threaded architecture 53 MPC#E processor 53 SiS# chipset 53 UltraSPARC T2 53 RISC architectures 53 multithreaded applications 53 IXP# [001] 53 Extended Memory 53 SATA controller 53 NUMAlink 53 ARM9 processor 53 ARM Cortex A9 53 JIT compiler 53 SSE3 instructions 53 #MB GDDR3 53 Agilent #A [001] 53 Core2 53 Units GPUs 53 Freescale PowerPC 53 Phenom II processor 53 DPUs 53 Flash MCU 53 ARM#T processor 53 GPU compute accelerators 53 GDDR2 53 synchronous DRAM 53 Interface MPI 53 CrossFire configuration 53 Nehalem processor 53 #.#Gbps [004] 53 #b/#b encoding 53 serial interfaces 53 4Gbyte 53 GPFS 53 core Atom N# 53 POWER5 + processor 53 STM8 53 CISC architecture 53 MB DDR 53 DSPs FPGAs 53 processor sockets 53 multicore architectures 53 PowerPro CG 53 Scalable Link 53 Nucleus OS 53 FBDIMM 53 #bit MCUs 53 PowerXCell 8i 53 GHz Opteron 53 LVDS outputs 53 AMCC PowerPC 53 Tensilica customizable 53 4MB L2 cache 53 MFLOPS 53 ARM9 CPU 52 ARM# processors 52 Northbridge chipset 52 MicroBlaze processor 52 microMIPS 52 GDDR2 memory 52 3Dc 52 DAC# 52 Intel Xeon X# 52 bitwise 52 #.#MHz [008] 52 Floating Point 52 Stratix III FPGAs 52 QuadCore 52 Serial ATA ports 52 XAUI 52 Socket AM3 52 ARM# MPCore processor 52 #GME 52 ARM9 core 52 OpenGL Shading Language 52 #.#μm CMOS process 52 2Gbps Fibre Channel 52 #GSE chipset 52 Socket AM2 + 52 ConnX D2 DSP 52 eSi RISC 52 Intel #GM chipset 52 PHY layer 52 CUDA TM 52 1Gbyte 52 nVidia chipset 52 embedded SRAM 52 T# #.#GHz [001] 52 2eSST 52 SRAM DRAM 52 compute intensive workloads 52 PCIe x# 52 Mobility Radeon HD 52 southbridge 52 quad core Intel Xeon 52 @ 6W processor 52 6Gbps SAS 52 1MB cache 52 Lucid HYDRA 52 VIA Nano processor 52 X# processors 52 Tesla GPUs 52 KB RAM 52 Nvidia nForce 52 2KB 52 PowerVR MBX 52 BLAS 52 Intel #GM 52 x# [004] 52 Universal Video Decoder 52 #.#v [004] 52 CEVA TL# 52 SIMD extensions 52 RealView Profiler 52 I2C compatible 52 Panasas storage 52 Intel Atom D# 52 #bit [002] 52 Opteron CPUs 52 HD# GPU 52 CineFX 52 EM#T processors 52 DDR2 SODIMM 52 ARM Cortex A8 52 ARM#EJ S processor 52 logical partitions 52 NVIDIA Tesla 52 PCI Express slot 52 vNIC 52 QDRII + 52 H8S 52 COM ports 52 Rambus XDR memory 52 compute intensive 52 TMS#C#x + 52 SystemC models 52 PowerQUICC III 52 H# chipset 52 reconfigurable computing 52 Mbits 52 Serdes 52 transceiver IC 52 ARM7TDMI core 52 M3 processor 52 VPUs 52 Asus motherboard 52 OpenGL 52 #Mbits [002] 52 OpenCV 52 I2C bus 52 Cortus APS3 52 PowerPC 52 dual DVI 52 2GB DDR 52 GPU compute 52 MIPS# #K 52 Hyper Threading Technology 52 NetLogic Microsystems XLP 52 Power4 52 5xx 52 optimizing compilers 52 MPCore 52 NVIDIA nForce 52 FIFOs 52 CoreMP7 52 NVIDIA Tesla C# 52 Pentium4 52 CEVA TeakLite 52 P Invoke 52 TI TMS#C#x + 52 IBM Power4 52 VSIPL 52 #.#Gbps [003] 52 DIMM modules 52 BT.# 52 GDDR memory 52 DDR2 SDRAM memory 52 RISC architecture 52 bytecode 52 #.#GHz Xeon [002] 52 PowerEdge SC# [001] 52 Mali# [002] 52 #.#GBps 52 #MHz memory 52 DirectCompute 52 X# Pro 52 Intel Hyper Threading 52 ARM processor 52 CPU GPU 52 #GB/sec 52 #MHz DDR2 memory 52 JTAG port 52 #FSB 52 Intel IOP# 52 #MHz DDR2 52 OSEck 52 LVDS 52 AGP 4X 52 SLI chipset 52 8MB cache 52 AGP8X 52 PCIe x4 52 UART interfaces 52 MHz CPU 52 pulse width modulator PWM 52 GF# chip 52 DIMM 52 Nvidia GPU 52 Technology EM#T 52 QuickPath Interconnect 52 baseband processing 52 PowerPC #MP 52 Nvidia Geforce 52 OptimoDE 52 XLP# 52 OCTEON Plus processor 52 Error Correction Code 52 PCIe Gen2 52 LVDS output 52 multicore 52 OpenAL 52 PCI Express Gen2 52 nonblocking 52 Fusiv 52 mux demux 52 quad core CPU 52 #GSE 52 synchronous serial 52 ZSP# 52 ARM7 TM 52 Core i7 processors 52 Parallelism 52 Enea LINX 51 X# XT [001] 51 transistor SRAM 51 Freescale ColdFire 51 MCP# [001] 51 DDR3 ECC memory 51 ADA# 51 Intel Core i7 #X 51 superscalar processor 51 DDR3 SDRAM 51 OneNAND Flash 51 interleaved 51 serial EEPROMs 51 Ultra# SCSI 51 bit memory addressability 51 LAPACK routines 51 x# architectures 51 UltraSPARC 51 customizable dataplane processor 51 3Gb s SATA 51 Hybrid CrossFire 51 symmetrical multiprocessing 51 RMI XLR 51 nm CMOS process 51 #.#Gb s [002] 51 AMD Opteron tm 51 Cortex R4 51 #b/#b [001] 51 baud rate 51 fast Fourier transforms 51 core Intel Xeon 51 Intel Wireless MMX2 51 GFLOPs 51 multicores 51 quad socket 51 PXA3xx 51 HPC workloads 51 TTL compatible 51 synchronization primitives 51 microprocessors microcontrollers 51 DDR2 #MHz [002] 51 Blackfin processors 51 Jazelle RCT 51 nForce #i 51 5V CMOS 51 workstation graphics accelerators 51 DDR3 SODIMM 51 DDR/DDR2 51 TMS#C#x 51 Harpertown 51 memory subsystem 51 interleaving 51 Intel E# chipset 51 6Gbps 51 TigerSHARC 51 PowerPC cores 51 LAPACK 51 MCF# 51 RocketIO TM 51 LVCMOS 51 Intel Nehalem microarchitecture 51 programmable DSPs 51 regex 51 HyperTransport interconnect 51 QDRII 51 parallelize 51 output GPIO 51 SPECviewperf 51 #/#-bit [002] 51 AMD# [001] 51 SAS expanders 51 Xeon L# 51 Atom ™ 51 GHz CPU 51 uniprocessor 51 #.#Gbps [001] 51 core MIPS# 51 microcontrollers MCUs 51 POWER5 + 51 interprocessor communication 51 Xscale 51 #WF Series 51 MHz frontside bus 51 heterogeneous architectures 51 CUDA architecture 51 GeForce Boost 51 multipathing 51 x# processor 51 #Kc 51 Multithreading 51 logic analyzer 51 SLI connector 51 4KB 51 Nehalem processors 51 digital converters ADCs 51 I2C 51 AMD Duron 51 GPIO ports 51 AMD Opteron Processors 51 I2C interface 51 AMD Socket AM2 51 POWERVR 51 Propus 51 SSE4 instructions 51 #ksps 51 x4 PCI Express 51 Intel Celeron D 51 clockspeeds 51 DL# G2 51 multiprocessor architecture 51 Serial EEPROM 51 Ultra DMA 51 PCIe x# slot 51 DDR2 DDR3 51 ATA IDE 51 operand 51 GHz Power5 51 2Gbyte 51 AMBA interconnect 51 rasterizer 51 CrossFire configurations 51 Freescale MPC# 51 INtime 51 Intel GMA 51 Kontron AM# 51 SMBus 51 Intel #GM Express 51 FB DIMMs 51 Gb Ethernet 51 Intel Nehalem 51 FineSim Pro 51 LINQ queries 51 MIPS# R 51 pin TQFP packages 51 Intel #GME 51 nForce3 51 PowerNow 51 CrossfireX 51 Mpts ch 51 compute blades 51 .# micron 51 ATCA blade 51 encoding decoding 51 TI C#x DSP 51 #.#GHz 2MB 51 core MIPS# processors 51 OpenCL 51 #bit ADC 51 SPI interface 51 PCIe x# slots 51 Xeon X# 51 R8C/Tiny 51 vectorized 51 Multiprocessing 51 DDR3 #MHz memory 51 ARM MIPS 51 #M GT graphics 51 LSISAS# 51 VME# 51 Freescale i.MX# [002] 51 ARM#JZF S 51 #bit memory 51 PXA#x 51 VarioTAP ® 51 DDR2 51 DDR2 SO DIMM 51 MPC# [003] 51 TMS#C# DSP 51 serializer 51 SH# [004] 51 Graphics Accelerator 51 eDRAM 51 AVR microcontrollers 51 OpenGL graphics 51 Lucid Hydra 51 i7 #QM [002] 51 asymmetric multiprocessing AMP 51 discrete GPUs 51 Clovertown 51 ProASIC Plus 51 FPGA 51 Wildcat Realizm 51 Cortex A5 processor 51 core Xeon processor 51 ISE #.#i 51 #/#Mbps Ethernet 51 TI OMAP# processor 51 GMA X# graphics 51 STM# microcontrollers 51 Macraigor 51 RF baseband 51 LGA# socket [001] 51 tuple 51 CEVA XC# 51 CoreConnect 51 FSMLabs RTLinux 51 x4 x8 51 TMS#C# 51 QorIQ processors 51 consumes #mW 51 LUTs 51 SuperServer ® 51 Nvidia Quadro FX #M 51 USART 51 MegaCore 51 gigabit serial 51 NVIDIA GPU 51 uC 51 ARM Cortex A9 processor 51 Intel Core2 Extreme 51 8bit MCU 51 PCRE 51 ARM#T core 51 Direct2D 51 LPAR 51 channel DDR3 memory 51 fully buffered DIMM 51 PCI Express 51 VME#x 51 Zroute 51 SHARC processors 51 multicore DSP 51 graphics processors 51 VHDL code 51 Nehalem EP processors 51 Threading Building Blocks 51 ARM#EJ S core 51 NVIDIA Tesla GPUs 51 ARM7TDMI processor 51 GB DDR2 51 #Mbytes [001] 51 GDDR3 RAM 51 TSMC #nm process 51 DirectX9 51 HyperTransport ™ 51 TMS#DM# [001] 51 nForce #i Ultra 51 rpm spindle speed 51 Radeon X# graphics [002] 51 ATI Crossfire 51 Core i5 CPU 51 JTAG interface 51 genlock 51 MB GDDR3 50 core Xeons 50 TCP IP networking 50 #/#Base-T Ethernet 50 #M GT 50 mini ITX motherboard 50 ARM#JF S 50 ARM PrimeCell 50 PCIe x8 50 LatticeECP2M 50 QuickPath 50 SiS#FX 50 MPSoC 50 #Msps [001] 50 PWM frequency 50 processor #M bytes 50 2D graphics 50 nVidia nForce 50 Tolapai 50 Host Controller 50 ARM9 TM 50 STA# [001] 50 microcode 50 Ultra Low Voltage 50 MPC# processors 50 pseudo SRAM 50 MIPS architecture 50 BlueCat Linux 50 multithreading capabilities 50 abstraction layer 50 Efficeon 50 teraFLOPS 50 VRaptor 50 QEMU 50 GPU computing 50 CPUs GPUs 50 compute shader 50 CUDA Fortran 50 #Msps [002] 50 graphics processor 50 PCI X 50 Nios II 50 #KE cores 50 daisy chaining 50 ARM# core [002] 50 C# DSP 50 AT#SAM#G# 50 DDR3 modules 50 CMX# [002] 50 CrossFireX ™ 50 compute nodes 50 socket AM3