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(Click for frequent words.) 65 IBM CoreConnect 63 CoreConnect 63 SystemC models 62 AMBA AHB 61 MicroBlaze processor 61 Xtensa processors 61 datapath 61 ARM# core [001] 60 PXI PCI 60 Fast Fourier Transform FFT 60 CoWare Platform Architect 60 AXI TM 59 customizable dataplane processor 59 datapaths 59 heterogeneous multicore 59 DDR PHY 59 RISC microprocessor 59 SoC Encounter 59 Xtensa processor 59 DSP BIOS TM 58 RISC processor 58 VSIPL 58 C#x DSP 58 StarCore DSP 58 serdes 58 RISC DSP 58 CPU emulation 58 baseband processing 58 CEVA X# 58 FPGA architectures 58 algorithmic synthesis 58 DSP algorithm 58 dsPIC DSC 58 coprocessing 58 LTE PHY 58 Multithreaded 58 Xilinx FPGA 58 GPIB instruments 58 DSP architectures 58 multicore DSPs 58 partial reconfiguration 58 ARM#JZF S processor 57 VarioTAP ® 57 Tx Rx 57 SoC designs 57 G.PAK 57 fast Fourier transform 57 8GHz 57 Blackfin processors 57 dc dc controller 57 AMBA AXI 57 Zroute 57 Rambus XDR memory 57 SH 4A 57 CellMath IP 57 Cortex M1 57 Mach Zehnder modulator 57 IPsec SSL 57 TMS#DM# [002] 57 MODBUS RTU 57 audio CODEC 57 bit RISC processor 57 Intel Wireless MMX2 57 RLDRAM II 57 USART 57 PCIe Gen2 56 SGI RASC 56 synthesizable IP 56 SOC designs 56 Altera FPGAs 56 MicroBlaze 56 TCI# 56 2eSST 56 fast Fourier transforms 56 I2C serial 56 SystemC modeling 56 Differential Signaling 56 ARM AMBA 56 C#x + 56 picoArray 56 SPICE simulator 56 SMBus 56 Ultrasonic sensors 56 RF amplifier 56 routability 56 I2C bus 56 serial RapidIO 56 Evaluation Module 56 RTL synthesis 56 ASIC prototyping 56 hardware accelerators 56 SPARC V8 56 FineSim Pro 56 VHDL code 56 C#x + DSP 56 multiply accumulate 56 GPIB interface 56 SIMD instruction 56 synthesizable RTL 56 #Gbps serial 56 bit #MHz PCI 56 FPGA fabric 56 multicore architectures 56 8bit MCU 56 Iub 56 echo canceller 56 STA# [001] 56 #bit RISC 56 RF vector 56 GPIB USB 56 multirate 56 differential signaling LVDS 56 PWM frequency 56 Profinet IO 56 embedded processor cores 56 Serdes 56 VI BRICK 55 PowerQUICC III 55 PID loop 55 DFT MAX 55 locked loops PLLs 55 Xtensa LX processor 55 Freescale MSC# 55 Cadence Encounter 55 Sequence PowerTheater 55 AVR ONE 55 TMS#C#x + DSP 55 RISC cores 55 DDR/DDR2 55 AMIS # 55 #bit MCU 55 CEVA XC 55 PowerPro MG 55 wavelength tunability 55 algorithms 55 matrix multiplication 55 tunable filters 55 GDSII flow 55 datapath synthesis 55 FPGA prototyping 55 MCP# AFE 55 #G DQPSK 55 hardware abstraction layer 55 ATmega#RFA# 55 FPGAs ASICs 55 Agilent EXA 55 SoC architectures 55 IO Link 55 SOPC Builder 55 ESL synthesis 55 reconfigurability 55 interprocess communication 55 CMOS RF transceiver 55 serial interfaces 55 MPC#e 55 LabVIEW graphical programming 55 VarioTAP 55 Acoustic Echo Cancellation 55 SystemWeaver 55 SystemC TLM 55 Altera Quartus II 55 Synplify DSP 55 Logical Volume Manager 55 MPC#E processor 55 visit www.analog.com 55 LVDS output 55 PCI Express PHY 55 VME PCI 55 Cortex M3 core 55 ARM# [003] 55 ARM#E 55 interfaces 55 SystemVerilog verification 55 Cortex processor 55 superscalar processor 55 datapath designs 55 ADCs DACs 55 interprocessor communications 55 Laptop Bags Check 55 testbenches 55 programmability 55 IEEE#.# [002] 55 MediaLB 55 SDRAM controller 55 PXI Express 55 Vdd 55 CoWare SystemC 55 I2C SPI 55 acoustic echo cancellation 55 CEVA X# DSP 55 uC 55 Symmetric Multi Processing 55 MPSoC 55 GbE controller 55 DigRF 55 CAN transceivers 55 MPC# processor 55 RealTime Designer 55 Gigabit PHY 55 VHDL AMS 54 ASIC FPGA 54 local oscillator LO 54 RocketIO TM 54 LabWindows CVI 54 AXI 54 #K CPS 54 NeoKicks 54 I2C compatible 54 QuickPath interconnect 54 PXIe 54 Forte Cynthesizer 54 HCS# 54 Spread Spectrum 54 fpgas 54 deserializer 54 coprocessor 54 baseband LSI 54 PCIe Gen 2 54 ARM Cortex M4 54 DDR2 memory interface 54 Stratix III FPGAs 54 PICO Extreme 54 i.MX# processor [001] 54 DQPSK 54 Talus Vortex 54 PMICs 54 BlueZ 54 linearization 54 sensorless 54 e# cores 54 Labview 54 S#X [002] 54 Message Passing 54 Ethernet MACs 54 ARM9 core 54 FPGA prototypes 54 DSP BIOS 54 bidirectional communication 54 fasp 54 protocol stacks 54 optimized 54 interprocessor communication 54 optimizations 54 Actel FPGA 54 RapidMind platform 54 SPICE simulation 54 TI DaVinci 54 technologies piezo resistive 54 Synopsys Galaxy 54 SPI serial 54 PWM pulse width modulation 54 NXP Nexperia 54 XFP optics 54 NexusWare Core 54 TJA# 54 dc dc conversion 54 SGMII 54 NIST MINEX compliant 54 AFEs 54 DSP FPGA 54 sRIO 54 ADC DAC 54 QUICC Engine technology 54 Theseus Titanium 54 Tundra Tsi# 54 CANbus 54 CellMath 54 modulation formats 54 ConnX D2 DSP 54 coding decoding 54 ARM# ™ 54 Magma Talus 54 CEVA TeakLite III 54 MSC# DSP 54 serial EEPROMs 54 pixel shaders 54 Texas Instruments OMAP# 54 capacitive touch sensing 54 UltraFLEX 54 ASIC SoC 54 #bit MCUs 54 Methodology Kit 54 serializer deserializer SerDes 54 dataplane 54 sigma delta ADC 54 results QoR 54 SmartFusion devices 54 Marvell #W# 54 O subsystem 54 TigerSHARC 54 reticle enhancement 54 dynamically reconfigurable 54 chip SoCs 54 VisualSim 54 synchronous buck controller 54 SIMD instructions 54 #bit memory 54 PID controllers 54 OpenAL 54 SignalExpress 54 Freescale MPC# 54 combinatorial optimization 53 ARM7 processor 53 unified shader 53 IP cores 53 waveform generator 53 RTAX DSP 53 Xilinx FPGAs 53 DSP subsystem 53 STARCAD CEL 53 CustomSim 53 National Instruments LabVIEW 53 CAN LIN 53 TTL CMOS 53 programmable FPGA 53 C#x DSPs [001] 53 JTAG interface 53 ARM Cortex ™ 53 multicore DSP 53 Zarlink ZL# 53 LAPACK 53 Extensible Processing Platform 53 PICO Express 53 fully synthesizable 53 SMIC #.#um 53 RF ICs 53 webMethods ESB 53 TMS#DM# [001] 53 multiple CPU cores 53 XRT#L# 53 MicroBlaze soft processor 53 MatLab 53 SRIO 53 Encounter Timing System 53 Stratix IV FPGA 53 QoR 53 instrumentation amplifiers 53 programmable DSPs 53 MTCMOS 53 DSPs FPGAs 53 Profibus DeviceNet 53 GPON EPON 53 TI OMAP# processor 53 MIL STD #B 53 Nios II Compiler 53 L2 L7 53 TMS#TCI# 53 ISE #.#i 53 GPIOs 53 reconfigurable hardware 53 OpenAccess database 53 PCB layout 53 LabView 53 Design Compiler Graphical 53 baseband modem 53 Blackfin processor 53 serializer deserializer 53 memory BIST 53 HardCopy ASIC 53 toolsuite 53 piezo actuator 53 QAM quadrature amplitude modulation 53 Cadence Incisive 53 CgFX 53 Atrenta SpyGlass 53 RTL Compiler 53 parallelizing 53 QuickCap NX 53 DPOJET 53 #bit PCI 53 RMI XLR 53 equivalence checking 53 peripheral DMA 53 parameterized 53 ProASIC3 FPGAs 53 I2C 53 Application Specific Extension 53 CSR BlueCore5 Multimedia 53 PSpice 53 AMBA protocol 53 programmable shaders 53 ANSI C 53 compiler optimizations 53 MPC#D processor 53 GNSS receivers 53 SIwave 53 NanoTime 53 DFM DFY 53 Logic Navigator 53 AMBA ® 53 chip variation OCV 53 PID controller 53 SoCs ASICs 53 Attenuator 53 baseband MAC 53 National Instruments LabView 53 ARM Cortex R4 53 Freescale QorIQ 53 dsPIC#F 53 synchronous DRAM SDRAM 53 stateless offload 53 Simulink models 53 ARM cores 53 IC Compiler #.# 53 IEEE #.# JTAG 53 multiprocessor architecture 53 Serial Peripheral Interface SPI 53 multicore SoC 53 linearly scalable 53 TI C#x 53 #bit ADC 53 Blackfin Processors 53 mask reconfigurable 53 HardCopy II 53 symmetrical multiprocessing 53 pulse width modulation 53 ETHERNET Powerlink 53 coprocessors 53 IEEE #.#.# compliant 53 i.MX processors 53 synthesizable 53 impedances 53 Cortex A9 MPCore 53 Digital Signal Controllers 53 CellMath Designer 53 synchronous asynchronous 53 compilers debuggers 53 Agilent MXA 53 PHY MAC 53 AVR microcontroller 53 Xilinx Spartan 3A 53 Atmel ATmega#RFA# 53 ARM microcontroller 53 PCIe GbE 53 GigaThread 53 FlexPhase 53 Fusion MPT 53 reconfigurable transceiver 53 loopback mode 53 synchronous buck converter 53 Macraigor 53 analog baseband 53 Magma RTL 52 #.#.#/ZigBee 52 UCD# 52 Multi threading 52 TI TMS# 52 8G Fibre Channel 52 dataplane processing 52 ADRES 52 SymNet 52 PHY layer 52 stereo codec 52 analog circuitry 52 PID loops 52 algebraic expressions 52 SiliconSmart 52 PLLs 52 Stratix II FPGA 52 IntelliMAX 52 Viterbi decoder 52 SHARC processors 52 CoWare ESL 52 CoSy 52 AVR microcontrollers 52 InfiniBand Adapters 52 ModBus 52 Xilinx Virtex 5 52 SRAM DRAM 52 bit sigma delta 52 HDL simulator 52 XA Spartan 3A 52 baseband DSP 52 ARM#EJ S TM 52 executable specification 52 RTL simulation 52 POL converters 52 Quadro GPU 52 DUTs 52 PowerPCs 52 Intel QuickPath Interconnect 52 Watchdog Timer 52 waveform analyzer 52 vectorization 52 UTMI 52 optimizing compiler 52 NI LabView 52 Compact FieldPoint 52 C#x [001] 52 fieldbuses 52 AVR# [002] 52 Cortex R4 processor 52 nP# 52 galvanically isolated 52 CMOS transistors 52 ARM7TDMI processor 52 PECL 52 pixel shading 52 LED brightness 52 synchronous serial 52 embedded EEPROM 52 Stratix FPGAs 52 baud rate 52 RF Microwave 52 TCP IP stacks 52 NanoSim 52 NI TestStand 52 EM simulation 52 photonic quantum 52 loopbacks 52 frequency synthesizers 52 eSi 52 microprocessors microcontrollers 52 level synthesis HLS 52 XML parsing 52 downlink uplink 52 TRF# [002] 52 processor DSP 52 AVR# UC3 52 Powerful debug 52 ADSP BF# 52 Nios II processor 52 interprocess communications 52 frequency synthesizer 52 Bi directional 52 V# platform 52 SFDR spurious free 52 integrated circuits ASIC 52 logarithmic amplifiers 52 Cortex A9 processors 52 multiport 52 Raman amplifiers 52 RS-#/# serial 52 LTR# 52 parameterisation 52 Freescale MCUs 52 delta sigma 52 CAN #.#B 52 #/#G [002] 52 TRF# [001] 52 GaAs MMIC 52 programmable DSP 52 5V CMOS 52 PHY interfaces 52 ATA IDE 52 LatticeEC 52 AVR MCU 52 Ethernet LXI 52 Talus Design 52 Silicon Germanium SiGe 52 rotary encoder 52 voltage CMOS 52 CY#C#x# 52 signal controllers DSCs 52 Tensilica DPUs 52 computationally intense 52 CompactPCI ® 52 OpenGL ES#.# 52 LGS 3D 52 Altera Stratix IV 52 6WINDGate 52 PowerPro CG 52 FPGA ASIC 52 Array FPGA 52 lithography simulation 52 frequency dividers 52 Multiprocessor 52 PowerPC #SX 52 Silicon Germanium 52 Cortex R4 52 memory subsystem 52 please visit www.EXFO.com 52 RS#/RS# 52 Xtensa LX 52 optimization algorithms 52 Encounter Conformal Constraint Designer 52 decoding algorithms 52 Carrier Grade RTLinux 52 #.#μm CMOS 52 Solido Variation Designer 52 LXI instruments 52 HSIM 52 Spartan 3E 52 8PSK 52 finite element method 52 TCP IP offload 52 pipelined architecture 52 QuickPath 52 MTS# 52 multiprocessor systems 52 upconverters 52 RocketIO 51 Design Compiler 51 Synplify 51 MBd 51 PXI Express chassis 51 ESD diodes 51 architectures 51 OCTEON Plus processor 51 PIP POP 51 microprocessor cores 51 Cortex M4 51 Olympus SoC 51 Audyssey MultEQ 51 Analog FastSPICE 51 Rapid IO 51 spectral density 51 automatic parallelization 51 ARM# [001] 51 adaptive equalization 51 #MHz memory 51 multiplexer demultiplexer 51 OptimoDE 51 CoreMP7 51 modulated RF 51 #.#.# ZigBee 51 PowerVR SGX graphics 51 ADI Blackfin 51 flux vector 51 Digital Signal Processor 51 graphical debugging 51 reconfigurable computing 51 Stratix II GX FPGA 51 Synplify Pro software 51 Altera HardCopy 51 galvanic isolation 51 termination resistors 51 MCF# 51 Apache RedHawk 51 sine cosine 51 PXA3xx 51 oscillator frequency 51 JIT compilation 51 polar modulation 51 Nucleus OS 51 SerDes 51 Altivec 51 RFIC design 51 SSE2 51 Infiniium oscilloscopes 51 arbitrary waveform generators 51 serializer 51 Vitesse VSC# 51 ARM Cortex processor 51 Java bytecode 51 MIPS cores 51 demodulating 51 netlists 51 SiWare Logic libraries 51 Cadence Virtuoso custom 51 SpeedStep 51 PowerCentric 51 PCell 51 parametric equalizer 51 LINQ queries 51 UWB transceiver 51 FIFOs 51 Le# [002] 51 SiPs 51 multithread 51 ARM9 processor 51 wavetable 51 multimedia codecs 51 OFDM orthogonal frequency 51 bytecodes 51 AT#SAM# [002] 51 sigma delta 51 wideband codecs 51 schematic capture 51 synchronous rectifier 51 voltage dividers 51 computationally intensive tasks 51 tunable optical 51 protocol conformance 51 fieldbus interfaces 51 flyback converter 51 greatly simplifying 51 Enea LINX 51 ProASIC3 devices 51 synchronizers 51 NI CompactRIO 51 Vx# [002] 51 C# DSP 51 PCI PXI 51 TI DM# [001] 51 synthesizable Verilog 51 Bit MCU 51 PowerTheater 51 Stratix II FPGAs 51 protocol interworking 51 #/#/# Mbps Ethernet 51 qubit quantum 51 x8 PCIe 51 PCIe Gen3 51 PCIe interconnect 51 Xilinx ML# 51 ARM#E S core 51 #/#BaseT Ethernet 51 XAUI 51 MATLAB algorithms 51 deterministically 51 Ultra DMA 51 iRCX format 51 Hypertransport 51 Xgig 51 directional couplers 51 demultiplexers 51 FPGA DSP 51 AltiVec 51 RISC processors 51 logic analyzers 51 embOS 51 MPEG encoder 51 OC-#/STM-# [001] 51 fragment shader 51 demultiplexing 51 synchronous Ethernet 51 DSP cores 51 silicon debug 51 TMS#C# ™ 51 Blaze MDP 51 gigabit serial 51 datarate 51 curve tracer 51 PCIe interface 51 multicore architecture 51 cluster nodes 51 CANopen DeviceNet 51 PolarPro 51 parallelization 51 ARM TrustZone 51 modulation schemes 51 Synopsys DesignWare 51 geometry shaders 51 subcarriers 51 WiMAX GSM EDGE 51 CC# RF transceiver 51 8kHz 51 asynchronous serial 51 Calibre xACT 3D 51 OCP socket 51 Synphony HLS 51 waveform 51 DigRF v3 51 decoupling capacitor 51 MOS transistors 51 magnetic encoder 51 TxDAC 51 IGLOO FPGAs 51 #MIPS [002] 51 LTE basestation 51 Fast SPICE 51 LPDDR2 51 TCP IP networking 51 Synopsys IC Compiler 51 3D ACIS Modeler 51 nanopositioning stages 51 Catia V5 51 waveform viewer 51 STM8 51 reprogrammable 51 integrated circuits ASICs 51 PLDs 51 XFP modules 51 Sigtran 51 electromagnetic simulation 51 Scali MPI Connect 51 5x #x 51 SmartDoctor 51 mosfet 51 Cadence Virtuoso 51 Zeligsoft CE 51 trunking gateway 51 SMPTE VC 1 51 DataDirect XML Converters 51 OSEck 51 bit RISC CPU 51 jitter attenuation 51 SLIMbus 51 channel bandwidths 51 SMA connectors 51 PNOZmulti 51 SAS expanders 51 Introduces Ultra Low 51 Measurement Studio 51 output MIMO 51 LVTTL 51 DesignWare DDR 51 HDS# 51 GDSII reference 51 MSn 51 table LUT 51 JTAG port 51 MATLAB ® 51 Virtuoso IC 51 ispMACH 51 SiGe bipolar 51 digital isolators 51 CPC# [002] 51 HDR rendering 51 LVCMOS 51 Cadence QRC Extraction 51 dsPIC 51 Xilinx ISE 51 Simatic PCS 7 51 Nucleus RTOS 51 Calibre DFM 51 OpenCV 51 RealView SoC Designer 51 AFS Nano 51 Hyper threading 51 parallel kinematics 51 programmable MTP 51 XIO# 51 Turbo CORE 51 SFN#F 50 multicore CPUs 50 Platform ASICs 50 HSPICE 50 Freescale QorIQ P# 50 parametrics 50 Nextiva Transit 50 reconfigurable logic 50 XO VCXOs 50 heterodyne 50 TetraMAX ATPG 50 Tsi#A 50 CriticalBlue Prism 50 transceiver IC 50 spectrophotometry 50 computationally efficient 50 Verilog simulation 50 multicore SoCs 50 #/#/#BASE-T 50 wireless basestations 50 #.#Hz 50 pluggable modules 50 peripheral interfaces 50 impedance matching 50 SH 2A 50 Autosar 50 ARM Cortex A9 processor 50 deep sub micron 50 ADF# 50 Teknovus EPON 50 RF baseband 50 QorIQ processors 50 ferrite beads 50 NoiseGuard technologies 50 PWM controller 50 TI DSP BIOS 50 multicore processor architectures 50 TI C# DSP 50 PXI instrumentation 50 ZG#M 50 NexusRoute 50 serial EEPROM devices 50 module TWR 50 Symmetric Multiprocessing SMP 50 iCoupler 50 MSC# DSPs 50 Quartz DRC 50 TestStand 50 multichip 50 EEPROM emulation 50 arrays FPGAs 50 UCC# 50 RTL verification 50 symmetric multiprocessing SMP 50 uPD# [001] 50 microprocessor architectures 50 SafeNet QuickSec 50 RFIC simulation 50 VME# 50 Viz Engine 50 cellular basestations 50 microarchitectures 50 ColdFire V1 50 vectorized 50 QorIQ platforms 50 Demodulator 50 Fractional N 50 #/#BaseT 50 Ext4 file 50 SystemC simulation 50 Lattice FPGAs 50 IPv#/IPv# 50 DPSK 50 QNX Neutrino 50 T#/E# interfaces 50 ElectricAccelerator 50 mosaicking 50 crosstalk cancellation 50 mux demux 50 IEEE#.# [001] 50 MIPS CPU 50 eVC 50 Nexxim 50 0 dBm 50 LatticeECP2M 50 deterministic Ethernet 50 transceiver modules 50 SERDES 50 band parametric EQ 50 TrustZone Software API 50 x1 PCIe 50 datarates 50 HARQ 50 Jbed Advanced 50 DDR2 memory controller 50 #/#-bit [002] 50 EEMBC benchmarks 50 TI TMS#C# TM 50 MHz PCI 50 #D/#D graphics engine 50 #bit microcontrollers 50 daughtercards 50 SIP Session Initiated Protocol 50 stripline 50 LatticeECP3 ™ 50 APS3 50 MPC# processors 50 PCI Express specification 50 optical interconnects 50 LEF DEF 50 iSCSI offload 50 SAR ADC 50 XtremeDSP 50 SiWare 50 Vitesse Carrier Ethernet 50 #MHz bandwidth 50 ACCELLERANT 50 visually lossless 50 DDR2 memory PCI Express 50 programmable shader 50 SR IOV 50 eSi RISC 50 JFET 50 ZigBee protocol 50 I2C interfaces 50 LEON3 processor 50 CPLDs 50 #GPP/#GPP# 50 waveforms 50 dsPIC DSCs 50 RF circuitry 50 EM simulator 50 InfiniBand QDR 50 SATA 6GB s 50 XSLT transformations 50 constraint solver 50 basestation 50 GigE Vision cameras 50 RF transmitter 50 DAC# 50 HomePlug powerline 50 FlexRay controller 50 PC/# modules 50 test DUT 50 Creo Elements Pro 50 BSDL files 50 asynchronous messaging 50 Moofwd Convergence Platform 50 multithreading capabilities 50 AEL# 50 MIDI controllers 50 ARM Compiler 50 transcoding encoding 50 NOR NAND 50 CharFlo Memory 50 Tektronix oscilloscope 50 GStreamer 50 LX#T FPGA 50 ST Nomadik 50 AMCC PowerPC 50 #WF Series 50 optical subassemblies 50 Kilopass XPM 50 PLL Noise Analyzer 50 ZMD# 50 FDD TDD 50 SIM Toolkit 50 DVB ASI 50 waveform portability 50 packetization 50 BCM# reference 50 PowerQuicc 50 SiRFatlasIV 50 CODECs 50 OpenGL graphics 50 ReDriver 50 FlexRay TM 50 Mali# [002] 50 PCIX 50 Optical Amplifier 50 #nm VCSEL [001] 50 multiplexing capability 50 JFET input 50 Virtual Machine VM